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TMP32C6411ZLZ Datasheet(PDF) 105 Page - Texas Instruments |
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TMP32C6411ZLZ Datasheet(HTML) 105 Page - Texas Instruments |
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105 / 119 page ![]() TMS320C6411 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS196H − MARCH 2002 − REVISED JULY 2004 105 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 MULTICHANNEL BUFFERED SERIAL PORT (McBSP) TIMING (CONTINUED) timing requirements for FSR when GSYNC = 1 (see Figure 52) NO. −300 UNIT NO. MIN MAX UNIT 1 tsu(FRH-CKSH) Setup time, FSR high before CLKS high 4 ns 2 th(CKSH-FRH) Hold time, FSR high after CLKS high 4 ns 2 1 CLKS FSR external CLKR/X (no need to resync) CLKR/X (needs resync) Figure 52. FSR Timing When GSYNC = 1 |
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