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TMP32C6411ZLZ Datasheet(PDF) 26 Page - Texas Instruments

No. de pieza TMP32C6411ZLZ
Descripción Electrónicos  FIXED POINT DIGITAL SIGNAL PROCESSOR
PDF  119 Pages
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Fabricante Electrónico  TI [Texas Instruments]
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TMP32C6411ZLZ Datasheet(HTML) 26 Page - Texas Instruments

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TMS320C6411
FIXEDPOINT DIGITAL SIGNAL PROCESSOR
SPRS196H − MARCH 2002 − REVISED JULY 2004
26
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
EDMA channel synchronization events
The C64x EDMA supports up to 64 EDMA channels which service peripheral devices and external memory.
Table 18 lists the source of C64x EDMA synchronization events associated with each of the programmable
EDMA channels. For the C6411 device, the association of an event to a channel is fixed; each of the EDMA
channels has one specific event associated with it. These specific events are captured in the EDMA event
registers (ERL, ERH) even if the events are disabled by the EDMA event enable registers (EERL, EERH). The
priority of each event can be specified independently in the transfer parameters stored in the EDMA parameter
RAM. For more detailed information on the EDMA module and how EDMA events are enabled, captured,
processed, linked, chained, and cleared, etc., see the TMS320C6000 DSP Enhanced Direct Memory Access
(EDMA) Controller Reference Guide (literature number SPRU234).
Table 18. TMS320C6411 EDMA Channel Synchronization Events†
EDMA
CHANNEL
EVENT NAME
EVENT DESCRIPTION
0
DSP_INT
HPI/PCI-to-DSP interrupt
1
TINT0
Timer 0 interrupt
2
TINT1
Timer 1 interrupt
3
SD_INT
EMIF SDRAM timer interrupt
4
GPINT4/EXT_INT4
GPIO event 4/External interrupt pin 4
5
GPINT5/EXT_INT5
GPIO event 5/External interrupt pin 5
6
GPINT6/EXT_INT6
GPIO event 6/External interrupt pin 6
7
GPINT7/EXT_INT7
GPIO event 7/External interrupt pin 7
8
GPINT0
GPIO event 0
9
GPINT1
GPIO event 1
10
GPINT2
GPIO event 2
11
GPINT3
GPIO event 3
12
XEVT0
McBSP0 transmit event
13
REVT0
McBSP0 receive event
14
XEVT1
McBSP1 transmit event
15
REVT1
McBSP1 receive event
16−18
–
None
19
TINT2
Timer 2 interrupt
20−47
–
None
48
GPINT8
GPIO event 8
49
GPINT9
GPIO event 9
50
GPINT10
GPIO event 10
51
GPINT11
GPIO event 11
52
GPINT12
GPIO event 12
53
GPINT13
GPIO event 13
54
GPINT14
GPIO event 14
55
GPINT15
GPIO event 15
56−63
–
None
† In addition to the events shown in this table, each of the 64 channels can also be synchronized with the transfer completion or alternate transfer
completion events. For more detailed information on EDMA event-transfer chaining, see the TMS320C6000 DSP Enhanced Direct Memory
Access (EDMA) Controller Reference Guide (literature number SPRU234).



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