TMP32C6411ZLZ datasheet(73/119 Pages) TI

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TMS320C6411

FIXEDPOINT DIGITAL SIGNAL PROCESSOR

SPRS196H − MARCH 2002 − REVISED JULY 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

INPUT AND OUTPUT CLOCKS (CONTINUED)

timing requirements for ECLKIN†‡§ (see Figure 19)

NO.

−300

UNIT

NO.

MIN

MAX

UNIT

tc(EKI)

Cycle time, ECLKIN

7.5¶

16P

tw(EKIH)

Pulse duration, ECLKIN high

3.38

tw(EKIL)

Pulse duration, ECLKIN low

3.38

tt(EKI)

Transition time, ECLKIN

tJ(EKI)

Period jitter, ECLKIN

0.02E

† P = 1/CPU clock frequency in ns. For example, when running parts at 300 MHz, use P = 3.33 ns.

‡ The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.

§ E = the EMIF input clock (ECLKIN, CPU/4 clock, or CPU/6 clock) period in ns for EMIFA or EMIFB.

¶ Minimum ECLKIN times are based on internal logic speed; the maximum useable speed of the EMIF may be lower due to AC timing requirements.

On the -300 device, 75-MHz operation is achievable if the requirements of the EMIF Device Speed section are met. Minimum ECLKIN cycle times

must be met, even when ECLKIN is generated by an internal clock source.

ECLKIN

Figure 19. ECLKIN Timing

switching characteristics over recommended operating conditions for ECLKOUT1§#||

(see Figure 20)

NO.

PARAMETER

−300

UNIT

NO.

PARAMETER

MIN

MAX

UNIT

tJ(EKO1)

Period jitter, ECLKOUT1

±175k

tw(EKO1H)

Pulse duration, ECLKOUT1 high

EH − 0.7

EH + 0.7

tw(EKO1L)

Pulse duration, ECLKOUT1 low

EL − 0.7

EL + 0.7

tt(EKO1)

Transition time, ECLKOUT1

td(EKIH-EKO1H)

Delay time, ECLKIN high to ECLKOUT1 high

td(EKIL-EKO1L)

Delay time, ECLKIN low to ECLKOUT1 low

§ E = the EMIF input clock (ECLKIN, CPU/4 clock, or CPU/6 clock) period in ns.

# The reference points for the rise and fall transitions are measured at VOL MAX and VOH MIN.

|| EH is the high period of E (EMIF input clock period) in ns and EL is the low period of E (EMIF input clock period) in ns.

kThis cycle-to-cycle jitter specification was measured with CPU/4 or CPU/6 as the source of the EMIF input clock.

ECLKIN

ECLKOUT1

Figure 20. ECLKOUT1 Timing

TMP32C6411ZLZ Datasheet(PDF) 73 Page - Texas Instruments

TMP32C6411ZLZ Datasheet(HTML) 73 Page - Texas Instruments

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