TMP32C6411ZLZ datasheet(37/119 Pages) TI

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TMS320C6411

FIXEDPOINT DIGITAL SIGNAL PROCESSOR

SPRS196H − MARCH 2002 − REVISED JULY 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

Terminal Functions

SIGNAL

TYPE†

IPD/

IPU‡

DESCRIPTION

NAME

NO.

TYPE†

IPD/

IPU‡

DESCRIPTION

CLOCK/PLL CONFIGURATION (CONTINUED)

CLKMODE0

IPD

Clock mode select

• Selects whether the CPU clock frequency = input clock frequency x1 (Bypass) [default] or

x6.

For more details on the CLKMODE0 pin and the PLL multiply factors, see the Clock PLL

section of this data sheet.

PLLV¶

PLL voltage supply

JTAG EMULATION

TMS

AB16

IPU

JTAG test-port mode select

TDO

AE19

O/Z

IPU

JTAG test-port data out

TDI

AF18

IPU

JTAG test-port data in

TCK

AF16

IPU

JTAG test-port clock

TRST

AB15

IPD

JTAG test-port reset. For IEEE 1149.1 JTAG compatibility, see the IEEE 1149.1 JTAG

Compatibility Statement section of this data sheet.

EMU11

AC18

I/O/Z

IPU

Emulation pin 11. Reserved for future use, leave unconnected.

EMU10

AD18

I/O/Z

IPU

Emulation pin 10. Reserved for future use, leave unconnected.

EMU9

AE18

I/O/Z

IPU

Emulation pin 9. Reserved for future use, leave unconnected.

EMU8

AC17

I/O/Z

IPU

Emulation pin 8. Reserved for future use, leave unconnected.

EMU7

AF17

I/O/Z

IPU

Emulation pin 7. Reserved for future use, leave unconnected.

EMU6

AD17

I/O/Z

IPU

Emulation pin 6. Reserved for future use, leave unconnected.

EMU5

AE17

I/O/Z

IPU

Emulation pin 5. Reserved for future use, leave unconnected.

EMU4

AC16

I/O/Z

IPU

Emulation pin 4. Reserved for future use, leave unconnected.

EMU3

AD16

I/O/Z

IPU

Emulation pin 3. Reserved for future use, leave unconnected.

EMU2

AE16

I/O/Z

IPU

Emulation pin 2. Reserved for future use, leave unconnected.

EMU1

AC15

I/O/Z

IPU

Emulation [1:0] pins

• Select the device functional mode of operation

EMU[1:0]

Operation

Boundary Scan/Normal Mode (see Note)

Reserved

Emulation/Normal Mode [default] (see the IEEE 1149.1 JTAG

Compatibility Statement section of this data sheet)

EMU1

EMU0

AC15

AF15

I/O/Z

IPU

Compatibility Statement section of this data sheet)

Normal mode refers to the DSPs normal operational mode, when the DSP is free running. The

DSP can be placed in normal operational mode when the EMU[1:0] pins are configured for

either Boundary Scan or Emulation.

Note: When the EMU[1:0] pins are configured for Boundary Scan mode, the internal pulldown

(IPD) on the TRST signal must not be opposed in order to operate in Normal mode.

For the Boundary Scan mode pulldown EMU[1:0] pins with a dedicated 1-k

Ω resister.

† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground

‡ IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. To pull up a signal to the opposite

supply rail, a 1-k

Ω resistor should be used, unless otherwise noted.)

§ These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.

¶ PLLV is not part of external voltage supply. See the Clock PLL section for information on how to connect this pin.

# A = Analog signal (PLL Filter)

TMP32C6411ZLZ Datasheet(PDF) 37 Page - Texas Instruments

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