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AD9910/PCBZ Datasheet(PDF) 14 Page - Analog Devices |
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AD9910/PCBZ Datasheet(HTML) 14 Page - Analog Devices |
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14 / 60 page ![]() AD9910 Rev. 0 | Page 14 of 60 –90 –100 –110 –120 –130 –140 –150 –160 10 100 1k 10k 100k 1M 10M 100M FREQUENCY OFFSET (Hz) fOUT = 20.1MHz fOUT = 397.8MHz fOUT = 98.6MHz fOUT = 201.1MHz 400 450 300 250 350 200 150 100 50 0 400 500 600 700 800 900 1000 SYSTEM CLOCK FREQUENCY (MHz) DVDD 1.8V AVDD 1.8V AVDD 3.3V DVDD 3.3V Figure 16. Residual Phase Noise, 1 GHz Operation Using a 50 MHz Reference Clock with 20× PLL Multiplier Figure 18. Power Dissipation vs. System Clock (PLL Enabled) 400 450 300 250 350 200 150 100 50 0 100 200 300 400 500 600 700 800 900 1000 SYSTEM CLOCK FREQUENCY (MHz) DVDD 3.3V AVDD 3.3V AVDD 1.8V DVDD 1.8V Figure 17. Power Dissipation vs. System Clock (PLL Disabled) |
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