AD9910SLASHPCBZ datasheet(5/60 Pages) AD

5 / 60 page

AD9910

Rev. 0 | Page 5 of 60

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

AVDD (1.8 V) and DVDD (1.8 V) = 1.8 V ± 5%, AVDD (3.3 V) = 3.3 V ± 5%, DVDD_I/O = 3.3 V ± 5%, T = 25°C, RSET = 10 kΩ,

IOUT = 20 mA, external reference clock frequency = 1000 MHz with REFCLK multiplier disabled, unless otherwise noted.

Table 1.

Parameter

Conditions/Comments

Min

Typ

Max

Unit

REF_CLK INPUT CHARACTERISTICS

Frequency Range

REFCLK Multiplier

Disabled

1000

MHz

Enabled

3.2

MHz

Maximum REFCLK Input Divider Frequency

Full temperature range

1500

1900

MHz

Minimum REFCLK Input Divider Frequency

Full temperature range

MHz

External Crystal

MHz

Input Capacitance

Input Impedance

Differential

2.8

kΩ

Single-ended

1.4

kΩ

Duty Cycle

REFCLK multiplier disabled

REFCLK multiplier enabled

REF_CLK Input level

Single-ended

1000

mV p-p

Differential

100

2000

mV p-p

REFCLK MULTIPLIER VCO CHARACTERISTICS

VCO Gain (KV) @ Center Frequency

VCO range Setting 0

429

MHz/V

VCO range Setting 1

500

MHz/V

VCO range Setting 2

555

MHz/V

VCO range Setting 3

750

MHz/V

VCO range Setting 4

789

MHz/V

VCO range Setting 51

850

MHz/V

REFCLK_OUT CHARACTERISTICS

Maximum Capacitive Load

Maximum Frequency

MHz

DAC OUTPUT CHARACTERISTICS

Full-Scale Output Current

8.6

31.6

Gain Error

−10

+10

%FS

Output Offset

2.3

μA

Differential Nonlinearity

0.8

LSB

Integral Nonlinearity

1.5

LSB

Output Capacitance

Residual Phase Noise

@ 1 kHz offset, 20 MHz AOUT

REFCLK Multiplier

Disabled

−152

dBc/Hz

Enabled @ 20×

−140

dBc/Hz

Enabled @ 100×

−140

dBc/Hz

Voltage Compliance Range

−0.5

+0.5

Wideband SFDR

See the Typical Performance

Characteristics section

Narrow-Band SFDR

50.1 MHz Analog Output

±500 kHz

–87

dBc

±125 kHz

–87

dBc

±12.5 kHz

–96

dBc

101.3 MHz Analog Output

±500 kHz

–87

dBc

±125 kHz

–87

dBc

±12.5 kHz

–95

dBc

AD9910/PCBZ Datasheet(PDF) 5 Page - Analog Devices

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