ATtiny44 datasheet(146/236 Pages) ATMEL

146 / 236 page

146

8006H–AVR–10/09

ATtiny24/44/84

done by first turning off the ADC, then changing multiplexer settings and then turn on the ADC.

Alternatively, the first conversion results after changing multiplexer settings should be discarded.

Notes:

1. See Table 16-5 for details.

2. See “Temperature Measurement” on page 144.

3. For offset calibration, only. See Table 16-5 on page 146 and “Operation” on page 133.

See Table 16-5 for details of selections of differential input channel selections as well as selec-

tions of offset calibration channels. MUX0 bit works as a gain selection bit for differential

channels. When MUX0 is cleared (‘0’) 1x gain is selected and when it is set (‘1’) 20x gain is

selected. For normal differential channel pairs MUX5 bit work as a polarity reversal bit. Toggling

of the MUX5 bit exhanges the positive and negative channel other way a round.

Table 16-4.

Single-Ended Input channel Selections.

Single Ended Input

MUX5:0

ADC0 (PA0)

000000

ADC1 (PA1)

000001

ADC2 (PA2)

000010

ADC3 (PA3)

000011

ADC4 (PA4)

000100

ADC5 (PA5)

000101

ADC6 (PA6)

000110

ADC7 (PA7)

000111

Reserved for differential channels(1)

001000 - 011111

0V (AGND)

100000

1.1V (I Ref)

100001

ADC8(2)

100010

Reserved for offset calibration(3)

100011 - 100111

Reserved for reversal differential channels(1)

101000 - 111111

Table 16-5.

Differential Input channel Selections.

Positive Differential Input

Negative Differential Input

MUX5:0

Gain 1x

Gain 20x

ADC0 (PA0)

ADC0 (PA0) (1)

N/A

100011

ADC1 (PA1)

001000

001001

ADC3 (PA3)

001010

001011

ADC1 (PA1)

ADC0 (PA0)

101000

101001

ADC2 (PA2)

001100

001101

ADC3 (PA3)

001110

001111

ADC2 (PA2)

ADC1 (PA1)

101100

101101

ADC3 (PA3)

010000

010001

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