ATtiny44 datasheet(143/236 Pages) ATMEL

143 / 236 page

143

8006H–AVR–10/09

ATtiny24/44/84

• Quantization Error: Due to the quantization of the input voltage into a finite number of codes,

a range of input voltages (1 LSB wide) will code to the same value. Always ± 0.5 LSB.

• Absolute Accuracy: The maximum deviation of an actual (unadjusted) transition compared to

an ideal transition for any code. This is the compound effect of offset, gain error, differential

error, non-linearity, and quantization error. Ideal value: ± 0.5 LSB.

16.11 ADC Conversion Result

After the conversion is complete (ADIF is high), the conversion result can be found in the ADC

Result Registers (ADCL, ADCH). The form of the conversion result depends on the type of the

conversio as there are three types of conversions: single ended conversion, unipolar differential

conversion and bipolar differential conversion.

16.11.1

Single Ended Conversion

For single ended conversion, the result is

where V

IN is the voltage on the selected input pin and VREF the selected voltage reference (see

Table 16-3 on page 145 and Table 16-4 on page 146). 0x000 represents analog ground, and

0x3FF represents the selected reference voltage minus one LSB. The result is presented in one-

sided form, from 0x3FF to 0x000.

16.11.2

Unipolar Differential Conversion

If differential channels and an unipolar input mode are used, the result is

where VPOS is the voltage on the positive input pin, VNEG the voltage on the negative input pin,

and VREF the selected voltage reference. The voltage of the positive pin must always be larger

than the voltage of the negative pin or otherwise the voltage difference is saturated to zero. The

result is presented in one-sided form, from 0x000 (0d) through 0x3FF (+1023d). The GAIN is

either 1x or 20x.

16.11.3

Bipolar Differential Conversion

If differential channels and a bipolar input mode are used, the result is

where VPOS is the voltage on the positive input pin, VNEG the voltage on the negative input pin,

and VREF the selected voltage reference. The result is presented in two’s complement form, from

0x200 (-512d) through 0x1FF (+511d). The GAIN is either 1x or 20x. Note that if the user wants

ADC

1024

⋅

REF

--------------------------

ADC

POS

NEG

–

() 1024

⋅

REF

-------------------------------------------------------- GAIN

⋅

ADC

POS

NEG

–

() 512

⋅

REF

----------------------------------------------------- GAIN

⋅

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