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ATtiny44 Datasheet(PDF) 44 Page - ATMEL Corporation |
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ATtiny44 Datasheet(HTML) 44 Page - ATMEL Corporation |
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44 / 236 page ![]() 44 8006H–AVR–10/09 ATtiny24/44/84 8.4.1.2 Safety Level 2 In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as one. A timed sequence is needed when changing the Watchdog Time-out period. To change the Watchdog Time-out, the following procedure must be followed: 1. In the same operation, write a logical one to WDCE and WDE. Even though the WDE always is set, the WDE must be written to one to start the timed sequence. 2. Within the next four clock cycles, in the same operation, write the WDP bits as desired, but with the WDCE bit cleared. The value written to the WDE bit is irrelevant. 8.4.2 Code Example The following code example shows one assembly and one C function for turning off the WDT. The example assumes that interrupts are controlled (e.g., by disabling interrupts globally) so that no interrupts will occur during execution of these functions. Note: See “Code Examples” on page 6. Assembly Code Example WDT_off: wdr ; Clear WDRF in MCUSR ldi r16, (0<<WDRF) out MCUSR, r16 ; Write logical one to WDCE and WDE ; Keep old prescaler setting to prevent unintentional Watchdog Reset in r16, WDTCSR ori r16, (1<<WDCE)|(1<<WDE) out WDTCSR, r16 ; Turn off WDT ldi r16, (0<<WDE) out WDTCSR, r16 ret C Code Example void WDT_off(void) { _WDR(); /* Clear WDRF in MCUSR */ MCUSR = 0x00 /* Write logical one to WDCE and WDE */ WDTCSR |= (1<<WDCE) | (1<<WDE); /* Turn off WDT */ WDTCSR = 0x00; } |
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