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ATtiny44 Datasheet(PDF) 95 Page - ATMEL Corporation |
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ATtiny44 Datasheet(HTML) 95 Page - ATMEL Corporation |
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95 / 236 page ![]() 95 8006H–AVR–10/09 ATtiny24/44/84 Figure 12-5. Compare Match Output Unit, Schematic (non-PWM Mode) The general I/O port function is overridden by the Output Compare (OC1x) from the Waveform Generator if either of the COM1x1:0 bits are set. However, the OC1x pin direction (input or out- put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction Register bit for the OC1x pin (DDR_OC1x) must be set as output before the OC1x value is visi- ble on the pin. The port override function is generally independent of the Waveform Generation mode, but there are some exceptions. See Table 12-2 on page 109, Table 12-3 on page 109 and Table 12-4 on page 109 for details. The design of the Output Compare pin logic allows initialization of the OC1x state before the out- put is enabled. Note that some COM1x1:0 bit settings are reserved for certain modes of operation. See “Register Description” on page 108 The COM1x1:0 bits have no effect on the Input Capture unit. 12.7.1 Compare Output Mode and Waveform Generation The Waveform Generator uses the COM1x1:0 bits differently in normal, CTC, and PWM modes. For all modes, setting the COM1x1:0 = 0 tells the Waveform Generator that no action on the OC1x Register is to be performed on the next compare match. For compare output actions in the non-PWM modes refer to Table 12-2 on page 109. For fast PWM mode refer to Table 12-3 on page 109, and for phase correct and phase and frequency correct PWM refer to Table 12-4 on page 109. A change of the COM1x1:0 bits state will have effect at the first compare match after the bits are written. For non-PWM modes, the action can be forced to have immediate effect by using the 1x strobe bits. PORT DDR DQ DQ OCnx Pin OCnx DQ Waveform Generator COMnx1 COMnx0 0 1 FOCnx clk I/O |
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