ATtiny44 datasheet(150/236 Pages) ATMEL

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8006H–AVR–10/09

ATtiny24/44/84

• Bit 6 – ACME: Analog Comparator Multiplexer Enable

See “ADCSRB – ADC Control and Status Register B” on page 131.

• Bit 5 – Res: Reserved Bit

This is a reserved bit in ATtiny24/44/84. For compatibility with future devices always write this bit

to zero.

• Bit 4 – ADLAR: ADC Left Adjust Result

The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.

Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the

ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-

sions. For a comple the description of this bit, see “ADCL and ADCH – ADC Data Register” on

page 149.

• Bit 3 – Res: Reserved Bit

This bit is reserved bit in the ATtiny24/44/84 and will always read as what was wrote there.

• Bits 2:0 – ADTS2:0: ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger

an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion

will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-

ger source that is cleared to a trigger source that is set, will generate a positive edge on the

trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running

mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set

16.13.5

DIDR0 – Digital Input Disable Register 0

• Bits 7..0 – ADC7D..ADC0D: ADC7..0 Digital Input Disable

When a bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled.

The corresponding PIN register bit will always read as zero when this bit is set. When an analog

signal is applied to the ADC7..0 pin and the digital input from this pin is not needed, this bit

should be written logic one to reduce power consumption in the digital input buffer.

Table 16-7.

ADC Auto Trigger Source Selections

ADTS2

ADTS1

ADTS0

Trigger Source

Free Running mode

Analog Comparator

External Interrupt Request 0

Timer/Counter0 Compare Match A

Timer/Counter0 Overflow

Timer/Counter1 Compare Match B

Timer/Counter1 Overflow

Timer/Counter1 Capture Event

Bit

765

432

0x01 (0x21)

ADC7D

ADC6D

ADC5D

ADC4D

ADC3D

ADC2D

ADC1D

ADC0D

DIDR0

Read/Write

R/W

Initial Value

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