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ATtiny44 Datasheet(PDF) 83 Page - ATMEL Corporation |
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ATtiny44 Datasheet(HTML) 83 Page - ATMEL Corporation |
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83 / 236 page ![]() 83 8006H–AVR–10/09 ATtiny24/44/84 Note: 1. MAX = 0xFF BOTTOM = 0x00 11.9.2 TCCR0B – Timer/Counter Control Register B • Bit 7 – FOC0A: Force Output Compare A The FOC0A bit is only active when the WGM bits specify a non-PWM mode. However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit, an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the forced compare. A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0A as TOP. The FOC0A bit is always read as zero. • Bit 6 – FOC0B: Force Output Compare B The FOC0B bit is only active when the WGM bits specify a non-PWM mode. However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit, an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is implemented as a strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the forced compare. Table 11-8. Waveform Generation Mode Bit Description Mode WGM02 WGM01 WGM00 Timer/Counter Mode of Operation TOP Update of OCRx at TOV Flag Set on (1) 0 000 Normal 0xFF Immediate MAX 1 001 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCRA Immediate MAX 3 011 Fast PWM0xFF BOTTOM MAX 4 100 Reserved – – – 5 101 PWM, Phase Correct OCRA TOP BOTTOM 6 110 Reserved – – – 7 111 Fast PWMOCRA BOTTOM TOP Bit 7 6 5 4 3 2 1 0 0x33 (0x53) FOC0A FOC0B – – WGM02 CS02 CS01 CS00 TCCR0B Read/Write WW RR R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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