ATtiny44 datasheet(37/236 Pages) ATMEL

37 / 236 page

8006H–AVR–10/09

ATtiny24/44/84

both BODS and BODSE must be set to one. Second, within four clock cycles, BODS must be

set to one and BODSE must be set to zero. The BODS bit is active three clock cycles after it is

set. A sleep instruction must be executed while BODS is active in order to turn off the BOD for

the actual sleep mode. The BODS bit is automatically cleared after three clock cycles.

In devices where Sleeping BOD has not been implemented this bit is unused and will always

read zero.

• Bit 5 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

• Bits 4, 3 – SM1..0: Sleep Mode Select Bits 2..0

These bits select between the three available sleep modes as shown in Table 7-2.

Note:

1. Only recommended with external crystal or resonator selected as clock source

• Bit 2 – BODSE: BOD Sleep Enable

BOD disable functionality is available in some devices, only. See “Limitations” on page 35.

The BODSE bit enables setting of BODS control bit, as explained on BODS bit description. BOD

disable is controlled by a timed sequence.

This bit is unused in devices where software BOD disable has not been implemented and will

read as zero in those devices.

7.5.2

PRR – Power Reduction Register

The Power Reduction Register provides a method to reduce power consumption by allowing

peripheral clock signals to be disabled.

• Bits 7, 6, 5, 4 – Res: Reserved Bits

These bits are reserved and will always read zero.

• Bit 3 – PRTIM1: Power Reduction Timer/Counter1

Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1

is enabled, operation will continue like before the shutdown.

Table 7-2.

Sleep Mode Select

SM1

SM0

Sleep Mode

Idle

ADC Noise Reduction

Power-down

Standby(1)

Bit

654

–

PRTIM1

PRTIM0

PRUSI

PRADC

PRR

Read/Write

RRR

R/W

Initial Value

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