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UPSD3313D-40U6T Datasheet(PDF) 24 Page - STMicroelectronics |
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UPSD3313D-40U6T Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 231 page ![]() uPSD33xx 24/231 Table 5. SFR Memory Map with Direct Address and Reset Value SFR Addr (hex) SFR Name Bit Name and <Bit Address> Reset Value (hex) Reg. Descr. with Link 76 5 4 3 2 1 0 80 RESERVED 81 SP SP[7:0] 07 Stack Pointer (SP), page 21 82 DPL DPL[7:0] 00 Data Pointer (DPTR), p age 21 83 DPH DPH[7:0] 00 84 RESERVED 85 DPTC – AT – – – DPSEL[2:0] 00 Table 13., page 37 86 DPTM – – – – MD1[1:0] MD0[1:0] 00 Table 14., page 38 87 PCON SMOD0 SMOD1 – POR RCLK1 TCLK1 PD IDLE 00 Table 24., page 50 88(1) TCON TF1 <8Fh> TR1 <8Eh> TF0 <8Dh> TR0 <8Ch> IE1 <8Bh> IT1 <8Ah> IE0 <89h> IT0 <88h> 00 Table 39., page 70 89 TMOD GATE C/T M1 M0 GATE C/T M1 M0 00 Table 40., page 72 8A TL0 TL0[7:0] 00 Standard Timer SFRs, pag e69 8B TL1 TL1[7:0] 00 8C TH0 TH0[7:0] 00 8D TH1 TH1[7:0] 00 8E P1SFS0 P1SFS0[7:0] 00 Table 29., page 60 8F P1SFS1 P1SFS1[7:0] 00 Table 30., page 60 90(1) P1 P1.7 <97h> P1.6 <96h> P1.5 <95h> P1.4 <94h> P1.3 <93h> P1.2 <92h> P1.1 <91h> P1.0 <90h> FF Table 25., page 57 91 P3SFS P3SFS[7:0] 00 Table 28., page 60 92 P4SFS0 P4SFS0[7:0] 00 Table 32., page 61 93 P4SFS1 P4SFS1[7:0] 00 Table 33., page 61 |
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