UPSD3313D-40U6T datasheet(85/231 Pages) STMICROELECTRONICS

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uPSD33xx

More About UART Mode 0

Refer to the block diagram in Figure 28., page 86,

and timing diagram in Figure 29., page 86.

Transmission is initiated by any instruction which

writes to the SFR named SBUF. At the end of a

write operation to SBUF, a 1 is loaded into the 9th

position of the transmit shift register and tells the

TX Control unit to begin a transmission. Transmis-

sion begins on the following MCU machine cycle,

when the “SEND” signal is active in Figure 29.

SEND enables the output of the shift register to the

alternate function on the port containing pin RxD,

and also enables the SHIFT CLOCK signal to the

alternate function on the port containing the pin,

TxD. At the end of each SHIFT CLOCK in which

SEND is active, the contents of the transmit shift

As data bits shift out to the right, zeros come in

from the left. When the MSB of the data byte is at

the output position of the shift register, then the '1'

that was initially loaded into the 9th position, is just

to the left of the MSB, and all positions to the left

of that contain zeros. This condition flags the TX

Control unit to do one last shift, then deactivate

SEND, and then set the interrupt flag TI. Both of

these actions occur at S1P1.

Reception is initiated by the condition REN = 1 and

RI = 0. At the end of the next MCU machine cycle,

the RX Control unit writes the bits 11111110 to the

receive shift register, and in the next clock phase

activates RECEIVE. RECEIVE enables the SHIFT

CLOCK signal to the alternate function on the port

containing the pin, TxD. Each pulse of SHIFT

CLOCK moves the contents of the receive shift

active. The value that comes in from the right is the

value that was sampled at the RxD pin. As data

bits come in from the right, 1s shift out to the left.

When the 0 that was initially loaded into the right-

most position arrives at the left-most position in the

shift register, it flags the RX Control unit to do one

last shift, and then it loads SBUF. After this, RE-

CEIVE is cleared, and the receive interrupt flag RI

is set.

UPSD3313D-40U6T Datasheet(PDF) 85 Page - STMicroelectronics

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