UPSD3313D-40U6T datasheet(53/231 Pages) STMICROELECTRONICS

53 / 231 page

53/231

uPSD33xx

I/O PORTS OF MCU MODULE

The MCU Module has three 8-bit I/O ports: Port 1,

Port 3, and Port 4. The PSD Module has four other

I/O ports: Port A, B, C, and D. This section de-

scribes only the I/O ports on the MCU Module.

I/O ports will function as bi-directional General

Purpose I/O (GPIO), but the port pins can have al-

ternate functions assigned at run-time by writing to

specific SFRs. The default operating mode (during

and after reset) for all three ports is GPIO input

mode. Port pins that have no external connection

will not float because each pin has an internal

weak pull-up (~150K ohms) to VCC.

I/O ports 3 and 4 are 5V tolerant, meaning they

can be driven/pulled externally up to 5.5V without

damage. The pins on Port 4 have a higher current

capability than the pins on Ports 1 and 3.

Three additional MCU ports (only on 80-pin

uPSD33xx devices) are dedicated to bring out the

8032 MCU address, data, and control signals to

external pins. One port, named MCUA[11:8], con-

tains four MCU address signal outputs. Another

port, named MCUAD[7:0], has eight multiplexed

address/data bidirectional signals. The third port

has MCU bus control outputs: read, write, program

fetch, and address latch. These ports are typically

used to connect external parallel peripherals and

memory devices, but they may NOT be used as

GPIO. Notice that only four of the eight upper ad-

dress signals come out to pins on the port MC-

UA[11:8]. If additional high-order address signals

are required on external pins (MCU addresses

A[15:12]), then these address signals can be

brought out as needed to PLD output pins or to the

Address Out mode pins on PSD Module ports.

See PSD Module section, “Latched Address Out-

put Mode, page 177 for details.

Figure 16., page 55 represents the flexibility of pin

function routing controlled by the SFRs. Each of

the 24 pins on three ports, P1, P3, and P4, may be

individually routed on a pin-by-pin basis to a de-

sired function.

MCU Port Operating Modes

MCU port pins can operate as GPIO or as alter-

nate functions (see Figure 17., page 56 through

Figure 19., page 57).

Depending on the selected pin function, a particu-

lar pin operating mode will automatically be used:

■

GPIO - Quasi-bidirectional mode

■

UART0, UART1 - Quasi-bidirectional mode

■

SPI - Quasi-bidirectional mode

■

I2C - Open drain mode

■

ADC - Analog input mode

■

PCA output - Push-Pull mode

■

PCA input - Input only (Quasi-bidirectional)

■

Timer 0,1,2 - Input only (Quasi-bidirectional)

GPIO Function. Ports in GPIO mode operate as

quasi-bidirectional pins, consistent with standard

8051 architecture. GPIO pins are individually con-

trolled by three SFRs:

■

SFR, P1 (Table 25., page 57)

■

SFR, P3 (Table 26., page 58)

■

SFR, P4 (Table 27., page 58)

These SFRs can be accessed using the Bit Ad-

dressing mode, an efficient way to control individ-

ual port pins.

GPIO Output. Simply stated, when a logic '0' is

written to a bit in any of these port SFRs while in

GPIO mode, the corresponding port pin will enable

a low-side driver, which pulls the pin to ground,

and at the same time releases the high-side driver

and pull-ups, resulting in a logic'0' output. When a

logic '1' is written to the SFR, the low-side driver is

released, the high-side driver is enabled for just

one MCU_CLK period to rapidly make the 0-to1

transition on the pin, while weak active pull-ups

(total ~150K ohms) to VCC are enabled. This struc-

ture is consistent with standard 8051 architecture.

The high side driver is momentarily enabled only

for 0-to-1 transitions, which is implemented with

the delay function at the latch output as pictured in

Figure 17., page 56 through Figure 19., page 57.

After the high-side driver is disabled, the two weak

pull-ups remain enabled resulting in a logic '1' out-

put at the pin, sourcing IOH uA to an external de-

vice. Optionally, an external pull-up resistor can be

added if additional source current is needed while

outputting a logic '1.'

UPSD3313D-40U6T Datasheet(PDF) 53 Page - STMicroelectronics

UPSD3313D-40U6T Datasheet(HTML) 53 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL