ATtiny44 datasheet(140/236 Pages) ATMEL

140 / 236 page

140

8006H–AVR–10/09

ATtiny24/44/84

Figure 16-8. Analog Input Circuitry

Note:

The capacitor in the figure depicts the total capacitance, including the sample/hold capacitor and

any stray or parasitic capacitance inside the device. The value given is worst case.

16.9

Noise Canceling Techniques

Digital circuitry inside and outside the device generates EMI which might affect the accuracy of

analog measurements. When conversion accuracy is critical, the noise level can be reduced by

applying the following techniques:

• Keep analog signal paths as short as possible.

• Make sure analog tracks run over the analog ground plane.

• Keep analog tracks well away from high-speed switching digital tracks.

• If any port pin is used as a digital output, it mustn’t switch while a conversion is in progress.

• Place bypass capacitors as close to V

CC and GND pins as possible.

Where high ADC accuracy is required it is recommended to use ADC Noise Reduction Mode, as

described in Section 16.7 on page 139. This is especially the case when system clock frequency

is above 1 MHz, or when the ADC is used for reading the internal temperature sensor, as

described in Section 16.12 on page 144. A good system design with properly placed, external

bypass capacitors does reduce the need for using ADC Noise Reduction Mode

16.10 ADC Accuracy Definitions

An n-bit single-ended ADC converts a voltage linearly between GND and V

REF in 2

n steps

(LSBs). The lowest code is read as 0, and the highest code is read as 2

n-1.

Several parameters describe the deviation from the ideal behavior, as follows:

ADCn

IIH

1..100 k

ohm

CS/H = 14 pF

VCC/2

IIL

ATtiny44 Datasheet(PDF) 140 Page - ATMEL Corporation