ATtiny44 datasheet(168/236 Pages) ATMEL

168 / 236 page

168

8006H–AVR–10/09

ATtiny24/44/84

19.7

High-Voltage Serial Programming Algorithm

To program and verify the ATtiny24/44/84 in the High-voltage Serial Programming mode, the fol-

lowing sequence is recommended (See instruction formats in Table 19-16 on page 171):

19.7.1

Enter High-voltage Serial Programming Mode

The following algorithm puts the device in High-voltage Serial Programming mode:

Set Prog_enable pins listed in Table 19-14 on page 167 to “000”, RESET pin and V

to 0V.

Apply 4.5 - 5.5V between V

CC and GND. Ensure that VCC reaches at least 1.8V within

the next 20 µs.

Wait 20 - 60 µs, and apply 11.5 - 12.5V to RESET.

Keep the Prog_enable pins unchanged for at least 10 µs after the High-voltage has

been applied to ensure the Prog_enable Signature has been latched.

Release the Prog_enable[2] pin after t

HVRST has elapsed.

Wait at least 300 µs before giving any serial instructions on SDI/SII.

Exit Programming mode by power the device down or by bringing RESET pin to 0V.

If the rise time of the V

CC is unable to fulfill the requirements listed above, the following alterna-

tive algorithm can be used:

Set Prog_enable pins listed in Table 19-14 on page 167 to “000”, RESET pin and V

to 0V.

Apply 4.5 - 5.5V between V

CC and GND.

Monitor V

CC, and as soon as VCC reaches 0.9 - 1.1V, apply 11.5 - 12.5V to RESET.

Keep the Prog_enable pins unchanged for at least 10 µs after the High-voltage has

been applied to ensure the Prog_enable Signature has been latched.

Release the Prog_enable[2] pin to avoid drive contention on the Prog_enable[2]/SDO

pin.

Wait until V

CC actually reaches 4.5 - 5.5V before giving any serial instructions on

SDI/SII.

Exit Programming mode by power the device down or by bringing RESET pin to 0V.

Table 19-15. High-voltage Reset Characteristics

Supply Voltage

RESET Pin High-voltage Threshold

Minimum High-voltage Period for

Latching Prog_enable

HVRST

4.5V

11.5V

100 ns

5.5V

11.5V

100 ns

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