ATtiny44 datasheet(112/236 Pages) ATMEL

112 / 236 page

112

8006H–AVR–10/09

ATtiny24/44/84

FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the

COM1x1:0 bits that determine the effect of the forced compare.

A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer

on Compare match (CTC) mode using OCR1A as TOP.

The FOC1A/FOC1B bits are always read as zero.

• Bit 5..0 – Reserved Bit

This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be

written to zero when the register is written.

12.11.4

TCNT1H and TCNT1L – Timer/Counter1

The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct

access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To

ensure that both the high and low bytes are read and written simultaneously when the CPU

accesses these registers, the access is performed using an 8-bit temporary high byte register

(TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit

Registers” on page 105.

Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a com-

pare match between TCNT1 and one of the OCR1x Registers.

Writing to the TCNT1 Register blocks (removes) the compare match on the following timer clock

for all compare units.

12.11.5

OCR1AH and OCR1AL – Output Compare Register 1 A

12.11.6

OCR1BH and OCR1BL – Output Compare Register 1 B

The Output Compare Registers contain a 16-bit value that is continuously compared with the

counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to

generate a waveform output on the OC1x pin.

The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are

written simultaneously when the CPU writes to these registers, the access is performed using an

8-bit temporary high byte register (TEMP). This temporary register is shared by all the other 16-

bit registers. See “Accessing 16-bit Registers” on page 105.

Bit

765

432

0x2D (0x4D)

TCNT1[15:8]

TCNT1H

0x2C (0x4C)

TCNT1[7:0]

TCNT1L

Read/Write

R/W

Initial Value

Bit

765

432

0x2B (0x4B)

OCR1A[15:8]

OCR1AH

0x2A (0x4A)

OCR1A[7:0]

OCR1AL

Read/Write

R/W

Initial Value

Bit

765

432

0x29 (0x49)

OCR1B[15:8]

OCR1BH

0x28 (0x48)

OCR1B[7:0]

OCR1BL

Read/Write

R/W

Initial Value

ATtiny44 Datasheet(PDF) 112 Page - ATMEL Corporation

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