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ATtiny44 Datasheet(PDF) 131 Page - ATMEL Corporation

No. de pieza ATtiny44
Descripción Electrónicos  8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
PDF  236 Pages
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATtiny44 Datasheet(HTML) 131 Page - ATMEL Corporation

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131
8006H–AVR–10/09
ATtiny24/44/84
between the Analog Comparator and the input capture function exists. To make the comparator
trigger the Timer/Counter1 Input Capture inter-rupt, the ICIE1 bit in the Timer Interrupt Mask
Register (TIMSK1) must be set.
• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator interrupt. The
different settings are shown in Table 15-2.
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the
bits are changed.
15.2.2
ADCSRB – ADC Control and Status Register B
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see “Analog Comparator Multiplexed Input” on page 129.
15.2.3
DIDR0 – Digital Input Disable Register 0
• Bits 2, 1– ADC2D, ADC1D: ADC 2/1 Digital input buffer disable
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be writ-
ten logic one to reduce power consumption in the digital input buffer.
Table 15-2.
ACIS1/ACIS0 Settings
ACIS1
ACIS0
Interrupt Mode
0
0
Comparator Interrupt on Output Toggle.
01
Reserved
1
0
Comparator Interrupt on Falling Output Edge.
1
1
Comparator Interrupt on Rising Output Edge.
Bit
7
6543210
0x03 (0x23)
BIN
ACME
–
ADLAR
–
ADTS2
ADTS1
ADTS0
ADCSRB
Read/Write
R/W
R/W
RR/W
RR/W
R/W
R/W
Initial Value
0
0000000
Bit
765
432
10
0x01 (0x21)
ADC7D
ADC6D
ADC5D
ADC4D
ADC3D
ADC2D
ADC1D
ADC0D
DIDR0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0



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