LP8733-Q1 datasheet(8/86 Pages) TI2

8 / 86 page

6.5 Electrical Characteristics (continued)

Limits apply over the junction temperature range –40°C ≤ TJ ≤ +140°C, specified VVANA, VVIN_Bx, VVIN_LDOx, VVOUT_Bx,

VVOUT_LDOx and IOUT range, unless otherwise noted. Typical values are at TJ = 25°C, VVANA = VVIN_Bx = VVIN_LDOx = 3.7 V,

and VOUT = 1 V, unless otherwise noted(1) (2).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IPFM-PWM

PFM-to-PWM - current

threshold(5)

550

IPWM-PFM

PWM-to-PFM - current

threshold(5)

290

IADD

Phase adding level

(dual-phase output)

From 1-phase to 2-phase

1000

ISHED

Phase shedding level

(dual-phase output)

From 2-phase to 1-phase

650

RDIS_Bx

Output pulldown

resistance

Regulator disabled

150

250

350

Output voltage

monitoring for PGOOD

pin and for power-good

Interrupt

V(VIN_Bx) and V(VANA) fixed 3.7 V

Overvoltage threshold (compared to DC output

voltage level, VVOUT_Bx_DC)

Undervoltage threshold (compared to DC

output voltage level, VVOUT_Bx_DC)

–53

–40

–29

Deglitch time during operation and after

voltage change

µs

Gating time for PGOOD

signal after regulator

enable or voltage change

PGOOD_MODE = 0

800

µs

LDO REGULATORS

VIN_LDOx

Input voltage range for

LDO power inputs

VIN_LDOx can be higher or lower than V(VANA)

2.5

3.7

5.5

VOUT_LDOx

Output voltage

Programmable voltage range

0.8

3.3

Step size

0.1

IOUT_LDOx

Output current

300

Dropout voltage

V(VIN_LDOx) – V(VOUT_LDOx), IOUT = IOUT(max),

Programmed output voltage is higher than

V(VIN_LDOx)

200

VOUT_LDO_DC

DC output voltage

accuracy, includes

voltage reference, DC

load and line regulations,

process, temperature

VOUT < 1 V

–20

VOUT ≥ 1 V

–2%

DCLNR

DC line regulation

IOUT = 1 mA

0.1

%/V

DCLDR

DC load regulation

IOUT = 1 mA to IOUT(max)

0.8%

TLDSR

Transient load step

response

IOUT = 1 mA to 300 mA, TR = TF = 1 µs

–50/+40

TLNSR

Transient line response

V(VIN_LDOx) stepping 3 V ↔ 3.5 V, TR = TF = 10

µs, IOUT = IOUT(max)

±7

PSRR

Power supply ripple

rejection

ƒ = 10 kHz, IOUT = IOUT(max)

Noise

10 Hz < F < 100 kHz, IOUT = IOUT(max)

µVrms

ISHORT(LDOx)

LDO current limit

VOUT = 0 V

400

500

600

Start-up time

From enable to valid output voltage

300

µs

Slew rate during start-up

mV/µs

RDIS_LDOx

Output pulldown

resistance

Regulator disabled

150

250

350

LP8733-Q1

SNVSB64A – JUNE 2019 – REVISED JUNE 2021

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