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LP8733-Q1 Datasheet(PDF) 58 Page - Texas Instruments |
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LP8733-Q1 Datasheet(HTML) 58 Page - Texas Instruments |
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58 / 86 page  Table 7-73. TOP_MASK_1 Register Field Descriptions (continued) Bits Field Type Default Description 4 SYNC_CLK _MASK R/W X Masking for the external clock detection interrupt (SYNC_CLK_INT in INT_TOP_1 register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the SYNC_CLK_STAT status bit in the TOP_STAT register. 3 Reserved - do not use R/W 0 2 TDIE_WARN _MASK R/W X Masking for the thermal warning interrupt (TDIE_WARN_INT in INT_TOP_1 register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the TDIE_WARN_STAT status bit in the TOP_STAT register. 1 Reserved - do not use R/W 0 0 I_MEAS _MASK R/W X Masking for the load current measurement ready interrupt (MEAS_INT in INT_TOP_1 register): 0 - Interrupt is generated. 1 - Interrupt is not generated. 7.6.1.34 TOP_MASK_2 TOP_MASK_2 is shown in Table 7-75, Address: 0x21 Table 7-74. TOP_MASK_2 Register D7 D6 D5 D4 D3 D2 D1 D0 Reserved - do not use RESET_REG _MASK Table 7-75. TOP_MASK_2 Register Field Descriptions Bits Field Type Default Description 7:1 Reserved - do not use R/W 000 0000 0 RESET_REG _MASK R/W X Masking for register reset interrupt (RESET_REG_INT in INT_TOP_2 register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This change of this bit by I2C writing has no effect because it will be read from OTP memory during reset. 7.6.1.35 BUCK_MASK BUCK_MASK is shown in Table 7-77, Address: 0x22 Table 7-76. BUCK_MASK Register D7 D6 D5 D4 D3 D2 D1 D0 BUCK1_PGF _MASK BUCK1_PGR _MASK Reserved - do not use BUCK1_ILIM _MASK BUCK0_PGF _MASK BUCK0_PGR _MASK Reserved - do not use BUCK0_ILIM _MASK Table 7-77. BUCK_MASK Register Field Descriptions Bits Field Type Default Description 7 BUCK1_PGF_MAS K R/W X Masking of the Power Good invalid detection for the Buck1 power good interrupt (BUCK1_PG_INT in INT_BUCK register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the BUCK1_PG_STAT status bit in the BUCK_STAT register. LP8733-Q1 SNVSB64A – JUNE 2019 – REVISED JUNE 2021 www.ti.com 58 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LP8733-Q1 |
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