LP8733-Q1 datasheet(74/86 Pages) TI2

74 / 86 page

RLOAD = 3.3 Ω

VOUT = 1 V

Figure 8-46. LDO Start-Up

ILOAD = 0 A

VOUT = 1 V

Figure 8-47. LDO Shutdown

IOUT = 0 A → 0.3 A → 0 A

TR = TF = 1 µs

Figure 8-48. LDO Transient Load Step Response

Figure 8-49. LDO VOUT Transition from 1.8 V to 1.2

Figure 8-50. LDO VOUT Transition from 1.2 V to 1.8

Start-up

delay is 500

µs

Figure 8-51. LDO Start-Up With Short on Output

9 Power Supply Recommendations

The device is designed to operate from an input voltage supply range between 2.8 V and 5.5 V. The VANA

input and VIN_Bx buck inputs must be connected together, and they must use the same input supply. This

input supply must be well regulated and able to withstand maximum input current and maintain stable voltage

without voltage drop even at load transition condition. The resistance of the input supply rail must be low enough

that the input current transient does not cause too high a drop in the LP8733xx-Q1 supply voltage that can

cause false UVLO fault triggering. If the input supply is located more than a few inches from the LP8733xx-Q1,

additional bulk capacitance may be required in addition to the ceramic bypass capacitors. The VIN_LDOx LDO

input supply voltage range is 2.5 V to 5.5 V and can be higher or lower than VANA supply voltage.

LP8733-Q1

SNVSB64A – JUNE 2019 – REVISED JUNE 2021

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LP8733-Q1 Datasheet(PDF) 74 Page - Texas Instruments