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LP8733-Q1 Datasheet(PDF) 59 Page - Texas Instruments

No. de pieza LP8733-Q1
Descripción Electrónicos  LP8733xx-Q1 Dual High-Current Buck Converter and Dual Linear Regulator
PDF  86 Pages
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Fabricante Electrónico  TI2 [Texas Instruments]
Página de inicio  https://www.ti.com
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LP8733-Q1 Datasheet(HTML) 59 Page - Texas Instruments

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Table 7-77. BUCK_MASK Register Field Descriptions (continued)
Bits
Field
Type
Default
Description
6
BUCK1_PGR_MAS
K
R/W
X
Masking of the Power Good valid detection for the Buck1 Power Good interrupt
(BUCK1_PG_INT in INT_BUCK register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the BUCK1_PG_STAT status bit in the BUCK_STAT register.
5
Reserved - do not
use
R
0
4
BUCK1_ILIM
_MASK
R/W
X
Masking for the Buck1 current limit detection interrupt (BUCK1_ILIM_INT in
INT_BUCK register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the BUCK1_ILIM_STAT status bit in the BUCK_STAT register.
3
BUCK0_PGF_MAS
K
R/W
X
Masking of the Power Good invalid detection for the Buck0 power good interrupt
(BUCK0_PG_INT in INT_BUCK register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect BUCK0_PG_STAT status bit in BUCK_STAT register.
2
BUCK0_PGR_MAS
K
R/W
X
Masking of the Power Good valid detection for the Buck0 power good interrupt
(BUCK0_PG_INT in INT_BUCK register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the BUCK0_PG_STAT status bit in the BUCK_STAT register.
1
Reserved - do not
use
R
0
0
BUCK0_ILIM
_MASK
R/W
X
Masking for the Buck0 current limit detection interrupt (BUCK0_ILIM_INT in
INT_BUCK register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the BUCK0_ILIM_STAT status bit in the BUCK_STAT register.
7.6.1.36 LDO_MASK
LDO_MASK is shown in Table 7-79, Address: 0x23
Table 7-78. LDO_MASK Register
D7
D6
D5
D4
D3
D2
D1
D0
LDO1_PGF
_MASK
LDO1_PGR
_MASK
Reserved - do
not use
LDO1_ILIM
_MASK
LDO0_PGF
_MASK
LDO0_PGR
_MASK
Reserved - do
not use
LDO0_ILIM
_MASK
Table 7-79. LDO_MASK Register Field Descriptions
Bits
Field
Type
Default
Description
7
LDO1_PGF_MASK
R/W
X
Masking of the Power Good invalid detection for the LDO1 power good interrupt
(LDO1_PG_INT in INT_LDO register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the LDO1_PG_STAT status bit in the LDO_STAT register.
6
LDO1_PGR_MASK
R/W
X
Masking of the Power Good valid detection for the LDO1 power good interrupt
(LDO1_PG_INT in INT_LDO register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the LDO1_PG_STAT status bit in the LDO_STAT register.
5
Reserved - do not
use
R
0
4
LDO1_ILIM
_MASK
R/W
X
Masking for the LDO1 current limit detection interrupt (LDO1_ILIM_INT in INT_LDO
register):
0 - Interrupt is generated.
1 - Interrupt is not generated.
This bit does not affect the LDO1_ILIM_STAT status bit in the LDO_STAT register.
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LP8733-Q1
SNVSB64A – JUNE 2019 – REVISED JUNE 2021
Copyright © 2022 Texas Instruments Incorporated
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