UPSD3313D-40T6 datasheet(70/231 Pages) STMICROELECTRONICS

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Table 39. TCON: Timer Control Register (SFR 88h, reset value 00h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TF1

TR1

TF0

TR0

IE1

IT1

IE0

IT0

Details

Bit

Symbol

R/W

Definition

TF1

Timer 1 overflow interrupt flag. Set by hardware upon overflow.

Automatically cleared by hardware after firmware services the interrupt

for Timer 1.

TR1

R,W

Timer 1 run control. 1 = Timer/Counter 1 is on, 0 = Timer/Counter 1 is off.

TF0

Timer 0 overflow interrupt flag. Set by hardware upon overflow.

Automatically cleared by hardware after firmware services the interrupt

for Timer 0.

TR0

R,W

Timer 0 run control. 1 = Timer/Counter 0 is on, 0 = Timer/Counter 0 is off.

3IE1

Interrupt flag for external interrupt pin, EXTINT1. Set by hardware when

edge is detected on pin. Automatically cleared by hardware after

firmware services EXTINT1 interrupt.

2IT1

R,W

Trigger type for external interrupt pin EXTINT1. 1 = falling edge, 0 = low-

level

1IE0

Interrupt flag for external interrupt pin, EXTINT0. Set by hardware when

edge is detected on pin. Automatically cleared by hardware after

firmware services EXTINT0 interrupt.

0IT0

R,W

Trigger type for external interrupt pin EXTINT0. 1 = falling edge, 0 = low-

level

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