UPSD3313D-40T6 datasheet(63/231 Pages) STMICROELECTRONICS

No. de pieza	UPSD3313D-40T6

Descripción Electrónicos	Fast 8032 MCU with Programmable Logic

PDF	231 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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uPSD33xx

Table 35. BUSCON: Bus Control Register (SFR 9Dh, reset value EBh)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

EPFQ

EBC

WRW[1:0]

RDW[1:0]

CW[1:0]

Details

Bit

Symbol

R/W

Definition

EPFQ

R,W

Enable Pre-Fetch Queue

0 = PFQ is disabled

1 = PFQ is enabled (default)

EBC

R,W

Enable Branch Cache

0 = BC is disabled

1 = BC is enabled (default)

5:4

WRW[1:0]

R,W

WR Wait, number of MCU_CLK periods for WR write bus cycle during

any MOVX instruction

00b: 4 clock periods

01b: 5 clock periods

10b: 6 clock periods (default)

11b: 7 clock periods

3:2

RDW[1:0]

R,W

RD Wait, number of MCU_CLK periods for RD read bus cycle during any

MOVX instruction

00b: 4 clock periods

01b: 5 clock periods

10b: 6 clock periods (default)

11b: 7 clock periods

1:0

CW[1:0]

R,W

Code Wait, number of MCU_CLK periods for PSEN read bus cycle

during any code byte fetch or during any MOVC code byte read

instruction. Periods will increase with PFQ stall

00b: 3 clock periods - exception, for MOVC instructions this setting

results 4 clock periods

01b: 4 clock periods

10b: 5 clock periods

11b: 6 clock periods (default)

UPSD3313D-40T6 Datasheet(PDF) 63 Page - STMicroelectronics

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