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M38039G8HKP Datasheet(PDF) 13 Page - Renesas Technology Corp |
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M38039G8HKP Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 92 page ![]() Rev.1.10 Nov 14, 2005 Page 13 of 91 REJ03B0166-0110 3803 Group (Spec.H QzROM version) PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. [CPU Mode Register (CPUM)] 003B16 The CPU mode register contains the stack page selection bit, the internal system clock control bits, etc. The CPU mode register is allocated at address 003B16. Fig 8. Structure of CPU mode register CPU mode register (CPUM: address 003B16) b7 b0 Stack page selection bit 0 : 0 page 1 : 1 page Processor mode bits b1 b0 0 0 : Single-chip mode 01 : 1 0 : Not available 11 : Main clock division ratio selection bits b7 b6 00 : φ = f(XIN)/2 (high-speed mode) 01 : φ = f(XIN)/8 (middle-speed mode) 10 : φ = f(XCIN)/2 (low-speed mode) 1 1 : Not available Fix this bit to “1”. 1 Port XC switch bit 0 : I/O port function (stop oscillating) 1: XCIN-XCOUT oscillating function Main clock (XIN-XOUT) stop bit 0 : Oscillating 1 : Stopped |
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