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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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M38039G8HKP Datasheet(PDF) 67 Page - Renesas Technology Corp |
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M38039G8HKP Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 92 page  Rev.1.10 Nov 14, 2005 Page 67 of 91 REJ03B0166-0110 3803 Group (Spec.H QzROM version) PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. Fig 62. State transitions of system clock CM4 : Port XC switch bit 0 : I/O port function (stop oscillating) 1 : XCIN-XCOUT oscillating function CM5 : Main clock (XIN-XOUT) stop bit 0 : Operating 1 : Stopped CM7, CM6: Main clock division ratio selection bit b7 b6 00 : φ = f(XIN)/2 (High-speed mode) 01 : φ = f(XIN)/8 (Middle-speed mode) 10 : φ = f(XCIN)/2 (Low-speed mode) 1 1 : Not available Reset C M 4 “0 ” ← → ”1 ” C M 6 “1 ” ← → ”0 ” C M 4 “1 ”← → ”0 ” C M 6 “1 ”← → ”0 ” CM6 “1” ←→”0” CM6 “1” ←→”0” CPU mode register (CPUM : address 003B16) b7 b4 C M 7 “0 ” ← → ”1 ” C M 6 “1 ” ← → ”0” High-speed mode (f( φ) = 4 MHz) CM7=0 CM6=0 CM5=0 (8 MHz oscillating) CM4=0 (32 kHz stopped) High-speed mode (f( φ) = 4 MHz) CM7=0 CM6=0 CM5=0 (8 MHz oscillating) CM4=1 (32 kHz oscillating) Notes1: Switch the mode by the allows shown between the mode blocks. (Do not switch between the modes directly without an allow.) 2: The all modes can be switched to the stop mode or the wait mode and return to the source mode when the stop mode or the wait mode is ended. 3: Timer operates in the wait mode. 4: When the stop mode is ended, a delay of approximately 1 ms occurs by connecting prescaler 12 and Timer 1 in middle/high- speed mode. 5: When the stop mode is ended, a delay of approximately 0.25 s occurs by Timer 1 and Timer 2 in low-speed mode. 6: Wait until oscillation stabilizes after oscillating the main clock X IN before the switching from the low-speed mode to middle/ high-speed mode. 7: The example assumes that 8 MHz is being applied to the XIN pin and 32 kHz to the XCIN pin. φ indicates the internal clock. Middle-speed mode (f( φ) = 1 MHz) CM7=0 CM6=1 CM5=0 (8 MHz oscillating) CM4=0 (32 kHz stopped) Middle-speed mode (f( φ) = 1 MHz) CM7=0 CM6=1 CM5=0 (8 MHz oscillating) CM4=1 (32 kHz oscillating) Low-speed mode (f( φ) = 16 kHz) CM7=1 CM6=0 CM5=0 (8 MHz oscillating) CM4=1 (32 kHz oscillating) Low-speed mode (f( φ) = 16 kHz) CM7=1 CM6=0 CM5=1 (8 MHz stopped) CM4=1 (32 kHz oscillating) |
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