LP8733 datasheet(33/86 Pages) TI2

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7.3.8.2 Warnings for Diagnosis (Interrupt)

7.3.8.2.1 Output Power Limit

The Buck regulators have programmable output peak current limits. The limits are individually programmed

for both regulators with the BUCKx_ILIM[2:0] bits in the BUCKx_CTRL_2 register. The current limit settings

of master and slave regulators used for the same output voltage rail must be identical. If the load current

is increased so that the current limit is triggered, then the regulator continues to regulate at the limit current

level (peak current regulation). The voltage may decrease if the load current is higher than the limit current.

If the current regulation continues for 20 µs, than the LP8733xx-Q1 device sets the BUCKx_ILIM_INT bit in

the INT_BUCK register and pulls the nINT pin low. The host processor can read the BUCKx_ILIM_STAT bits

in the BUCK_STAT register to see if the regulator is still in peak current regulation mode, and the interrupt

is cleared by writing 1 to the BUCKx_ILIM_INT bit. The current limit interrupt can be masked by setting the

BUCKx_ILIM_MASK bit in the BUCK_MASK register to 1. The Buck overload situation is shown in Figure 7-13.

Time

Voltage

VOUTx

350 mV

Time

Current

ILIMx

INT_BUCK(BUCKx_ILIM_INT)

20 µs

nINT

BUCK_STAT(BUCKx_STAT)

Resistive

pull-down

Regulator disabled by

digital

Host clearing the interrupt by writing to flags

New startup if

enable is valid

1 ms

INT_BUCK(BUCKx_SC_INT)

Figure 7-13. Buck Regulator Overload Situation

The LDO regulators also include current limit circuitry. If the load current is increased so that the current limit

is triggered, the regulator limits the output current to the threshold level. The voltage may decrease if the load

current is higher than the current limit. If the current regulation continues for 20 µs, the LP8733xx-Q1 device sets

the LDOx_ILIM_INT bit in the INT_LDO register and pulls the nINT pin low. The host processor can read the

LDOx_ILIM_STAT bits in the LDO_STAT register to see if the regulator is still in current regulation mode and the

interrupt is cleared by writing 1 to the LDOx_ILIM_INT bit. The current limit interrupt can be masked by setting

the LDOx_ILIM_MASK bit in the LDO_MASK register to 1. The LDO overload situation is shown in Figure 7-14.

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LP8733-Q1

SNVSB64A – JUNE 2019 – REVISED JUNE 2021

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