LP8733 datasheet(24/86 Pages) TI2

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0.6V

Enable

Time

Voltage

Soft start

Ramp

BUCKx_CTRL_2(BUCKx_SLEW_RATE[2:0])

Resistive pull-down

(if enabled)

BUCKx_VSET[7:0]

INT_BUCK(BUCKx_PG_INT)

nINT

Powergood

BUCK_STAT(BUCKx_PG_STAT)

0.35V

Voltage decrease because of load

BUCK_STAT(BUCKx_STAT)

BUCK_MASK(BUCKx_PGF_MASK) = 0

BUCK_MASK(BUCKx_PGR_MASK) = 0

Host clears

interrupts

Powergood

interrupts

0 1

Figure 7-6. Buck Regulator Enable and Disable

The LDO regulator is enabled by the EN pin or by I2C writing, as shown in Figure 7-7. The soft-start circuit

limits the in-rush current during start-up. The output voltage increase rate is less than 100 mV/μsec during

soft-start. If there is a short circuit at the output, and the output voltage does not increase above the 0.3-V

level in 1 ms or the output voltage drops below 0.3-V level during operation (for minimum of 1 ms), then the

regulator is disabled, and the LDOx_SC_INT interrupt in the INT_LDO register is set. When the output voltage

reaches the Power-Good threshold level, the LDOx_PG_INT interrupt flag in the INT_LDO register is set. The

Power-Good interrupt flag, when reaching valid output voltage, can be masked using the LDOx_PGR_MASK

bit in the LDO_MASK register. The Power-Good interrupt flag can also be generated when the output voltage

becomes invalid. The interrupt mask for invalid output voltage detection is set by the LDOx_PGF_MASK bit

in the LDO_MASK register. A LDOx_PG_STAT bit in the LDO_STAT register always shows the validity of

the output voltage; 1 means valid, and 0 means invalid output voltage. A PGOOD_WINDOW_LDO bit in the

PGOOD_CTRL_1 register sets the detection method for the valid LDO output voltage, either undervoltage

detection or undervoltage and overvoltage detection.

LP8733-Q1

SNVSB64A – JUNE 2019 – REVISED JUNE 2021

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