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M58PR256J Datasheet(PDF) 53 Page - STMicroelectronics

No. de pieza M58PR256J
Descripción Electrónicos  256 Mbit or 512 Mbit (x16, Multiple Bank, Multilevel, Burst) 1.8 V supply Flash memories
PDF  114 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M58PR256J Datasheet(HTML) 53 Page - STMicroelectronics

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M58PR256J, M58PR512J
Configuration Register
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Figure 6.
X-latency and data output configuration example
1.
The settings shown are X-latency = 4. tQVK_CPU is the data setup time required by the system CPU.
2.
Amax is equal to A23 in the M58PR256J and, to A24 in the M58PR512J.
Table 16.
Burst type definition
Start Address
8 Words
16 Words
Continuous Burst
0
0-1-2-3-4-5-6-7
0-1-2-3-4-5-6-7-8-9-10-11-12-13-14-15
0-1-2-3-4-5-6...
1
1-2-3-4-5-6-7-0
1-2-3-4-5-6-7-8-9-10-11-12-13-14-15-0
1-2-3-4-5-6-7...
2
2-3-4-5-6-7-0-1
2-3-4-5-6-7-8-9-10-11-12-13-14-15-0-1
2-3-4-5-6-7-8...
3
3-4-5-6-7-0-1-2
3-4-5-6-7-8-9-10-11-12-13-14-15-0-1-2
3-4-5-6-7-8-9...
...
7
7-0-1-2-3-4-5-6
7-8-9-10-11-12-13-14-15-0-1-2-3-4-5-6
7-8-9-10-11-12-13...
...
12
12-13-14-15-8-9-10-11
12-13-14-15-0-1-2-3-4-5-6-7-8-9-10-11
12-13-14-15-16-17...
13
13-14-15-8-9-10-11-12
13-14-15-0-1-2-3-4-5-6-7-8-9-10-11-12
13-14-15-16-17-18...
14
14-15-8-9-10-11-12-13
14-15-0-1-2-3-4-5-6-7-8-9-10-11-12-13
14-15-16-17-18-19...
15
15-8-9-10-11-12-13-14
15-0-1-2-3-4-5-6-7-8-9-10-11-12-13-14
15-16-17-18-19-20...
AI08904c
Amax-A0(1)
VALID ADDRESS
K
L
DQ15-DQ0
VALID DATA
X-latency
VALID DATA
1st cycle
2nd cycle
3rd cycle
4th cycle
E
tKHKH
tQVK_CPU
tKHQV



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