UPD360 datasheet(102/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 102

 2016-2017 Microchip Technology Inc.

Note 9-11

This default value is 1 when operating in standalone DFP mode. Otherwise, the default value is 0.

Note 9-12

This field is RO and reads back 01b when operating in UFP standalone mode. In standalone mode

this value does not indicate that VBUS is being actively measured. Whether or not VBUS is being

actively measured can be determined by reading VBUS_DB_ACTIVE.

9.12.24

VBUS THRESHOLD X REGISTERS (VBUS_THRX)

Note 9-13

The defaults are defined in Table 9-13.

VCONN1 Control

Enables the VCONN1 FET.

0b: VCONN1 FET is disabled

1b: VCONN1 FET is enabled

This bit has no meaning when in standalone mode (see Standalone Opera-

tion).

This bit automatically clears when a debounce VCONN OCS event occurs per

the assertion of VCONN Discharge Error (VCONN_DISCH_ERR)

R/W

1:0

VBUS Comparator Control

00b: Comparator and DAC disabled

01b: Sample VBUS

10b: Sample CFG_SEL0

11b: Sample CFG_SEL1 (UPD360-A/UPD360-B only)

After the sample of CFG_SEL0 or CFG_SEL1 has completed, this register

resets itself to 00b and disables the VBUS comparator.

Note:

This field is forced to 01b by hardware when operating as a stand-

alone UFP.

Note 9-12

00b

Address:

x=0: 0842h

x=1: 0844h

x=2: 0846h

x=3: 0848h

Size:

16 bits

Bits

Description

Type

Default

15:10

RESERVED

9:0

VBUS Threshold X (VBUS_THRX)

VBUS Threshold X register.

The lower byte of the threshold must be written before the upper byte. The

entire 10-bit threshold is updated when the second write occurs.

Note:

The units of this register are ~2.44 mV from a 2.5V FS.

R/W

Note 9-13

TABLE 9-13:

VBUS_THR DEFAULTS

VBUS_THR

VBUS Threshold

1R/9R Divider

VALUE

3.67

0.36

148

5.5

0.54

222

5.5

0.54

222

5.5

0.54

222

Bits

Description

Type

Default

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