UPD360 datasheet(63/221 Pages) MICROCHIP

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 2016-2017 Microchip Technology Inc.

DS00002084C-page 63

UPD360

8.5.35

OCS COMPARATOR CHANGE STATUS REGISTER (OCS_CMP_CHG_STS)

8.5.36

OCS COMPARATOR MATCH ENABLE REGISTER (OCS_CMP_MATCH_EN)

Address:

0082h

Size:

8 bits

Bits

Description

Type

Default

7:6

OCSx Match Valid (OCSx_MATCH_VLD)

Asserts after the OCS debouncer is first enabled, via OCS Comparator Con-

trol, and the first match becomes valid in OCS Comparator Match Register

(OCS_CMP_MATCH).

Bit 7 = OCS2_MATCH_VLD

Bit 6 = OCS1_MATCH_VLD

R/WC

5:2

RESERVED

1:0

OCSx Change Status (OCSx_CHG_STS)

When set, each bit indicates that the respective bit in OCS Comparator Match

Bit 1 = OCS2_CHG_STS

Bit 0 = OCS1_CHG_STS

A write of 1b clears the respective status bit.

R/WC

00b

Address:

0083h

Size:

8 bits

Bits

Description

Type

Default

7:6

OCSx Match Valid Enable (OCSx_MATCH_VLD_EN)

When set, the corresponding bit in OCS Comparator Change Status Register

(OCS_CMP_CHG_STS) can cause the assertion of the OCS_CMP_INT inter-

rupt.

Bit 7 = OCS2_MATCH_VLD_EN

Bit 6 = OCS1_MATCH_VLD_EN

R/W

5:2

RESERVED

1:0

OCSx Comparator Match Enable (OCSx_CMP_MATCH_EN)

When set the corresponding bit in OCS Comparator Change Status Register

(OCS_CMP_CHG_STS) can cause the assertion of the OCS_CMP_INT inter-

rupt.

Bit 1 = OCS2_CMP_MATCH_EN

Bit 0 = OCS1_CMP_MATCH_EN

R/W

00b

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