UPD360 datasheet(72/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 72

 2016-2017 Microchip Technology Inc.

9.2.2

SOURCE ATTACH DETECTION

When configured as a Source, the following sections describe the steps that are taken to determine if an attach has

occurred:

Software accesses the device via I2C/SPI which wakes the device up and enables the 48 MHz oscillator.

Software programs the CC Comparator Control to 00b and disables the CC debouncer.

Software polls CC_DB_ACTIVE until it reads back to indicate the CC debouncer is inactive.

Software programs the Match Debounce Register (MATCH_DEB) as required for the tPDDebounce period.

Software programs the VBUS Debounce Register (VBUS_DEB) as required.

Software programs the CCx Debounce Clear Enable Registers (CCx_DBCLR_EN) and CCx Match Enable Reg-

isters (CCx_MATCH_EN) as required to match the thresholds of interest.

Software programs the CCx Sample Enable Registers (CCx_SAMP_EN) and VBUS Match Enable Register

(VBUS_MATCH_EN) to detect VBUS VSafe0v Match (VSAFE0V_THR_MATCH).

Software enables the CC_MATCH_VLD, CC1_MATCH_CHG and CC2_MATCH_CHG interrupt via CC Interrupt

Enable Register (CC_INT_EN).

Software enables the VBUS_MATCH_VLD interrupt via the Power Interrupt Enable Register (PWR_INT_EN).

10. Software enables IRQ_N assertion by enabling the CC_INT, VBUS_INT and PWR_INT in the Interrupt Enable

11. Software programs the RP current sources via CC1 RP Value and CC2 RP Value in the CC Control Register

(CC_CTL).

12. Software programs the CC Threshold x Registers (CC_THRx), if required.

13. Software programs the CC Comparator Control to sample both CC pins and enables the CC debouncer. The

CC_DB_ACTIVE bit will assert soon after.

14. Software sets the Clock Control Register (CLK_CTL) to disable all clock sources accept for the keep alive clock.

15. When a UFP is attached an Rd pull-down, or Ra pull-down from active cable, is connected to one of the CC pins.

The CC comparator detects this.

16. Changes in state of the CC pin are recorded in the CCx Match Registers (CCx_MATCH) and CCx Change Status

Registers (CCx_CHG_STS) after the programmed debounce period.

17. CC_MATCH_VLD and CC1_MATCH_CHG or CC2_MATCH_CHG interrupt assert and CC_INT asserts which in

turn asserts IRQ_N pin. Likewise assertion of VBUS_MATCH_VLD causes PWR_INT to assert and also in turn

asserts IRQ_N.

18. Software implements a further debounce of the CC match for tCCDebounce in order to detect the attachment.

19. Software must verify, after VBUS_MATCH_VLD assertion, that the VBUS Match Register (VBUS_MATCH) indi-

cates vSafe0v is on VBUS.

20. After an attachment, software programs the device to power VBUS via the integrated PPC, if required. If the

power source is external to the device, software configures that source as required.

21. In the event that an active cable is attached, per the CCx Match Registers (CCx_MATCH), VCONN power may

be supplied by appropriately setting VCONN1 Control or VCONN2 Control in the VBUS Control Register

(VBUS_CTL).

22. CC Communication Select in the CC Control Register (CC_CTL) is set by software to appropriately connect the

baseband interface to the CC pin with the Rd pull-down.

23. The DFP may attempt to communicate with attached device utilizing the PD MAC if desired.

Note:

Assertion of CC_MATCH_VLD indicates that the initial CC debounce of both CC pins has completed and

a valid value is available in the CCx Match Registers (CCx_MATCH). VBUS_MATCH_VLD indicates a valid

value is available in the VBUS Match Register (VBUS_MATCH).

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