UPD360 datasheet(96/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 96

 2016-2017 Microchip Technology Inc.

9.12.18

VBUS DEBOUNCE CLEAR ENABLE REGISTER (VBUS_DBCLR_EN)

When a bit is set, the respective threshold shall be included in the VBUS debouncer. Alternatively, when cleared, the

respective threshold shall no longer be considered by the debouncer.

When VBUS_DBCLR_EN bits are set on-the-fly, if a mismatch between the current raw match vector (for the new

VBUS_DBCLR_EN) and the previous raw match vector (for the old VBUS_DBCLR_EN) exists, the DB will be reset.

Note:

Clearing bits in this register at run time does not reset the debouncer.

APPLICATION NOTE: Clearing a bit in VBUS Debounce Clear Enable Register (VBUS_DBCLR_EN) shall cause

the respective bit in VBUS Match Register (VBUS_MATCH) to be immediately updated upon

a change in state of the associated threshold. This causes a state change in VBUS Change

Status Register (VBUS_CHG_STS) and assertion of VBUS_INT, if enabled. To prevent this,

the VBUS Match Register (VBUS_MATCH) should be updated before the VBUS Debounce

Clear Enable Register (VBUS_DBCLR_EN) by having the associated threshold cleared.

Note 9-6

The default depends on the device’s configuration, as shown in table Table 9-11 which depends upon

CFG_SEL0 pin.

TABLE 9-10:

CCX_DBLCLR_DEB DEFAULTS

Configuration

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Standalone UFP

(UPD360-A/UPD360-B only)

Standalone DFP (Default Current)

(UPD360-A/UPD360-B only)

Standalone DFP (1.5 A)

(UPD360-A/UPD360-B only)

Standalone DFP (3.0 A)

(UPD360-A/UPD360-B only)

Other

Address:

081Ch

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:6

RESERVED

VBUS Debounce Clear Enable (VBUS3_DBCLR_DEB)

R/W

Note 9-6

VBUS Debounce Clear Enable (VBUS2_DBCLR_DEB)

R/W

Note 9-6

VBUS Debounce Clear Enable (VBUS1_DBCLR_DEB)

R/W

Note 9-6

VBUS Debounce Clear Enable (VBUS0_DBCLR_DEB)

R/W

Note 9-6

RESERVED

VSAFE0V Debounce Clear Enable 9 (VSAFE0V_DBCLR_DEB)

R/W

Note 9-6

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