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PM0223 Datasheet(PDF) 34 Page - STMicroelectronics |
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PM0223 Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 110 page ![]() The STM32L0 Cortex-M0+ Processor PM0223 34/110 DocID025763 Rev 1 2.5.1 Entering sleep mode This section describes the mechanisms software can use to put the processor into sleep mode. The system can generate spurious wakeup events, for example a debug operation wakes up the processor. For this reason, software must be able to put the processor back into sleep mode after such an event. A program might have an idle loop to put the processor back in to sleep mode. Wait for interrupt The Wait For Interrupt instruction, WFI, causes immediate entry to sleep mode. When the processor executes a WFI instruction it stops executing instructions and enters sleep mode. See 3.7.12: WFI on page 80 for more information. Wait for event The Wait For Event instruction, WFE, causes entry to sleep mode conditional on the value of a one-bit event register. When the processor executes a WFE instruction, it checks the value of the event register: See 3.7.11: WFE on page 79 for more information. If the event register is 1, this indicates that the processor must not enter sleep mode on exe- cution of a WFE instruction. Typically, this is because of the assertion of an external event, or because another processor in the system has executed a SEV instruction, see 3.7.9: SEV on page 77. Software cannot access this register directly. Sleep-on-exit If the SLEEPONEXIT bit of the SCR is set to 1, when the processor completes the execution of an exception handler and returns to Thread mode it immediately enters sleep mode. Use this mechanism in applications that only require the processor to run when an interrupt occurs. 2.5.2 Wakeup from sleep mode The conditions for the processor to wakeup depend on the mechanism that caused it to enter sleep mode. Wakeup from WFI or sleep-on-exit Normally, the processor wakes up only when it detects an exception with sufficient priority to cause exception entry. Some embedded systems might have to execute system restore tasks after the processor wakes up, and before it executes an interrupt handler. To achieve this set the PRIMASK.PM bit to 1. If an interrupt arrives that is enabled and has a higher priority than current exception priority, the processor wakes up but does not execute the interrupt handler until the proces- sor sets PRIMASK.PM to zero. For more information about PRIMASK, see Exception mask register on page 17. 0 The processor stops executing instructions and enters sleep mode. 1 The processor sets the register to zero and continues executing instructions without entering sleep mode. |
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