PM0223 datasheet(53/110 Pages) STMICROELECTRONICS

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PM0223

The STM32L0 Cortex-M0+ Instruction Set

3.5

General data processing instructions

Table 20 shows the data processing instructions:

Table 20. Data processing instructions

Mnemonic Brief description

See

ADCS

Add with Carry

3.5.1: ADC, ADD, RSB, SBC, and SUB on

page 54.

ADD{S}

Add

3.5.1: ADC, ADD, RSB, SBC, and SUB on

page 54.

ANDS

Logical AND

3.5.2: AND, ORR, EOR, and BIC on page 56.

ASRS

Arithmetic Shift Right

3.5.3: ASR, LSL, LSR, and ROR on page 57.

BICS

Bit Clear

3.5.2: AND, ORR, EOR, and BIC on page 56.

CMN

Compare Negative

3.5.4: CMP and CMN on page 59.

CMP

Compare

3.5.4: CMP and CMN on page 59.

EORS

Exclusive OR

3.5.2: AND, ORR, EOR, and BIC on page 56.

LSLS

Logical Shift Left

3.5.3: ASR, LSL, LSR, and ROR on page 57.

LSRS

Logical Shift Right

3.5.3: ASR, LSL, LSR, and ROR on page 57.

MOV{S}

Move

3.5.5: MOV and MVN on page 60.

MULS

Multiply

3.5.6: MULS on page 61.

MVNS

Move NOT

3.5.5: MOV and MVN on page 60.

ORRS

Logical OR

3.5.2: AND, ORR, EOR, and BIC on page 56.

REV

Reverse byte order in a word

3.5.7: REV, REV16, and REVSH on page 62.

REV16

Reverse byte order in each halfword

3.5.7: REV, REV16, and REVSH on page 62.

REVSH

Reverse byte order in bottom halfword

and sign extend

3.5.7: REV, REV16, and REVSH on page 62.

RORS

Rotate Right

3.5.3: ASR, LSL, LSR, and ROR on page 57.

RSBS

Reverse Subtract

3.5.1: ADC, ADD, RSB, SBC, and SUB on

page 54.

SBCS

Subtract with Carry

3.5.1: ADC, ADD, RSB, SBC, and SUB on

page 54.

SUBS

Subtract

3.5.1: ADC, ADD, RSB, SBC, and SUB on

page 54.

SXTB

Sign extend a byte

3.5.8: SXT and UXT on page 63.

SXTH

Sign extend a halfword

3.5.8: SXT and UXT on page 63.

UXTB

Zero extend a byte

3.5.8: SXT and UXT on page 63.

UXTH

Zero extend a halfword

3.5.8: SXT and UXT on page 63.

TST

Test

3.5.9: TST on page 64.

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