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PM0223 Datasheet(PDF) 11 Page - STMicroelectronics |
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PM0223 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 110 page ![]() DocID025763 Rev 1 11/110 PM0223 About this document 35 1.3.4 STM32L0 Cortex-M0+ core peripherals These are: Nested Vectored Interrupt Controller (NVIC) The NVIC is an embedded interrupt controller that supports low latency interrupt processing. System Control Block The System Control Block (SCB) is the programmers model interface to the processor. It provides system implementation information and system control, including configuration, control, and reporting of system exceptions. System timer The system timer, SysTick, is a 24-bit count-down timer. Use this as a Real Time Operating System (RTOS) tick timer or as a simple counter. Memory Protection Unit The Memory Protection Unit (MPU) improves system reliability by defining the memory attributes for different memory regions. It provides up to eight different regions, and an optional predefined background region. I/O port The I/O port provides single-cycle loads and stores to tightly-coupled peripherals. |
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