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PC87311A Datasheet(PDF) 49 Page - National Semiconductor (TI) |
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PC87311A Datasheet(HTML) 49 Page - National Semiconductor (TI) |
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49 / 78 page ![]() 60 Serial Ports (Continued) TABLE 6-2 PC87311A Register Summary for an Individual UART Channel Register Address 0DLABe0 0DLABe0 1DLABe0 2 3 4 5 6 7 0DLABe1 1DLABe1 No Bit Receiver Register Buffer (Read Only) Transmitter Register Holding (Write Only) Interrupt Register Enable Interrupt Register (Read Ident Only) Register Control Line Register MODEM Control Register Status Line Register MODEM Status Register (Note 4) Scratch Pad Divisor Latch (LS) Divisor Latch (MS) RBR THR IER IIR LCR MCR LSR MSR SCR DLL DLM 0 Data Bit 0 Data Bit 0 Enable ‘‘0’’ if Word Data Data Delta Bit 0 Bit 0 Bit 8 (Note 1) Received Interrupt Length Terminal Ready Clear Data Pending Select Ready (DR) to Send Available Bit 0 (DTR) Interrupt 1 Data Bit 1 Data Bit 1 Enable Interrupt Word Request Overrun Delta Bit 1 Bit 1 Bit 9 Transmitter ID Length to Send Error Data Holding Bit Select (RTS) (OE) Set Register Bit 1 Ready Empty Interrupt 2 Data Bit 2 Data Bit 2 Enable Interrupt Number of Out1 Parity Trailing Bit 2 Bit 2 Bit 10 Receiver ID Stop Bits Bit Error Edge Ring Line Status Bit (PE) Indicator Interrupt 3 Data Bit 3 Data Bit 3 Enable 0 Parity IRQ Framing Delta Bit 3 Bit 3 Bit 11 MODEM Enable Enable Error Data Status (Note 3) (FE) Carrier Interrupt Detect 4 Data Bit 4 Data Bit 4 0 0 Even Parity Loop Break Clear to Bit 4 Bit 4 Bit 12 Select Interrupt Send (BI) (CTS) 5 Data Bit 5 Data Bit 5 0 0 Stick 0 Transmitter Data Bit 5 Bit 5 Bit 13 Parity Holding Set Register Ready (THRE) (DSR) 6 Data Bit 6 Data Bit 6 0 0 Set 0 Transmitter Ring Bit 6 Bit 6 Bit 14 Break Empty Indicator (TEMT) (RI) (Note 2) 7 Data Bit 7 Data Bit 7 0 0 Divisor 0 0 Data Bit 7 Bit 7 Bit 15 Latch Carrier Access Bit Detect (DLAB) (DCD) Note 1 Bit 0 is the least significant bit It is the first bit serially transmitted or received Note 2 When operating in the XT mode this bit will be set any time that the transmitter shift register is empty Note 3 This bit no longer has a pin associated with it Note 4 When operating in the XT mode this register is not available 49 |
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