PC87311A datasheet(35/78 Pages) NSC

35 / 78 page

40 FDC Command Set Description (Continued)

The controller then starts the Data Separator and waits for

the Data Separator to find the next sector Address Field

The controller compares the Address Field ID information

(track head sector bytes per sector) with the desired ID

specified in the Command Phase If the sector ID bytes do

not match then the controller waits for the Data Separator

to find the next sector Address Field The ID comparison

process repeats until the Data Separator finds a sector Ad-

dress Field ID that matches it in the command bytes or until

an error occurs Possible errors are

1 The mP aborted the command by writing to the FIFO If

there is no disk in the drive the controller will hang up

The mP must then take the controller out of this hung

state by writing a byte to the FIFO This will put the con-

troller into the Result Phase

2 Two index pulses were detected since the search began

and no valid ID has been found If the track address ID

differs the WT bit or BT bit (if the track address is FF hex)

will be set in ST2 If the head sector or bytes per sector

code did not match the ND bit is set in ST1 If the Ad-

dress Field AM was never found the MA bit is set in ST1

3 The Address Field was found with a CRC error The CE

bit is set in ST1

Once the desired sector Address Field is found the control-

ler waits for the Data Separator to find the subsequent Data

Field for that sector If the Data Field (normal or deleted) is

not found within the expected time the controller terminates

the operation and enters the Result Phase (MD is set in

ST2) If a Deleted Data Mark is found and SK was set in the

Opcode command byte the controller skips this sector and

searches for the next sector Address Field as described

above The effect of SK on the Read Data command is

summarized in Table 4-6

Having found the Data Field the controller then transfers

data bytes from the disk drive to the host (described in Sec-

tion 53 Controller Phases) until the bytes per sector count

has been reached or the host terminates the operation

(through TC end of track or implicitly through overrun) The

controller will then generate the CRC for the sector and

compares this value with the CRC at the end of the Data

Field

Having finished reading the sector the controller will contin-

ue reading the next logical sector unless one or more of the

following termination conditions occurred

1 The DMA controller asserted TC The IC bits in ST0 are

set to Normal Termination

2 The last sector address (of side 1 if MT was set) was

equal to EOT The EOT bit in ST1 is set The IC bits in

ST0 are set to Abnormal Termination This is the expect-

ed condition during Non-DMA transfers

3 Overrun error The OR bit in ST1 is set The IC bits in ST0

are set to Abnormal Termination If the mP cannot service

a transfer request in time the last correctly read byte will

be transferred

4 CRC error The CE bit in ST1 and CD bit in ST2 are set

The IC bits in ST0 are set to Abnormal Termination

If MT was set in the Opcode command byte and the last

sector of side 0 has been transferred the controller will then

continue with side 1

Upon terminating the Execution Phase of the Read Data

command the controller will assert IRQ6 indicating the be-

ginning of the Result Phase The mP must then read the

result bytes from the FIFO The values that will be read back

in the result bytes are shown in Table 4-7 If an error occurs

the result bytes will indicate the sector read when the error

occurred

TABLE 4-6 SK Effect on Read Data Command

Data Type

Sector Read

CM Bit (ST2)

Description of Results

Normal

Normal Termination

Deleted

No Further Sectors Read

Normal

Normal Termination

Deleted

Sector Skipped

TABLE 4-7 Result Phase Termination Values with No Error

Sector

Last

ID Information at Result Phase

Track

Head

Sector

BytesSector

EOT

S a 1NC

EOT

T a 1NC

EOT

S a 1NC

EOT

T a 1NC

EOT

S a 1NC

EOT

S a 1NC

EOT

T a 10

EOT e End of Track Sector Number from Command Phase

S e Sector Number last operated on by controller

NC e No Change in Value

T e Track Number programmed in Command Phase

PC87311A Datasheet(PDF) 35 Page - National Semiconductor (TI)

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