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PIC17C44 Datasheet(PDF) 53 Page - Microchip Technology |
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PIC17C44 Datasheet(HTML) 53 Page - Microchip Technology |
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53 / 241 page ![]() © 1996 Microchip Technology Inc. DS30412C-page 53 PIC17C4X 9.0 I/O PORTS The PIC17C4X devices have five I/O ports, PORTA through PORTE. PORTB through PORTE have a corre- sponding Data Direction Register (DDR), which is used to configure the port pins as inputs or outputs. These five ports are made up of 33 I/O pins. Some of these ports pins are multiplexed with alternate functions. PORTC, PORTD, and PORTE are multiplexed with the system bus. These pins are configured as the system bus when the device’s configuration bits are selected to Microprocessor or Extended Microcontroller modes. In the two other microcontroller modes, these pins are general purpose I/O. PORTA and PORTB are multiplexed with the peripheral features of the device. These peripheral features are: • Timer modules • Capture module • PWM module • USART/SCI module • External Interrupt pin When some of these peripheral modules are turned on, the port pin will automatically configure to the alternate function. The modules that do this are: • PWM module • USART/SCI module When a pin is automatically configured as an output by a peripheral module, the pins data direction (DDR) bit is unknown. After disabling the peripheral module, the user should re-initialize the DDR bit to the desired con- figuration. The other peripheral modules (which require an input) must have their data direction bit configured appropri- ately. Note: A pin that is a peripheral input, can be con- figured as an output (DDRx<y> is cleared). The peripheral events will be determined by the action output on the port pin. 9.1 PORTA Register PORTA is a 6-bit wide latch. PORTA does not have a corresponding Data Direction Register (DDR). Reading PORTA reads the status of the pins. The RA1 pin is multiplexed with TMR0 clock input, and RA4 and RA5 are multiplexed with the USART func- tions. The control of RA4 and RA5 as outputs is auto- matically configured by the USART module. 9.1.1 USING RA2, RA3 AS OUTPUTS The RA2 and RA3 pins are open drain outputs. To use the RA2 or the RA3 pin(s) as output(s), simply write to the PORTA register the desired value. A '0' will cause the pin to drive low, while a '1' will cause the pin to float (hi-impedance). An external pull-up resistor should be used to pull the pin high. Writes to PORTA will not affect the other pins. FIGURE 9-1: RA0 AND RA1 BLOCK DIAGRAM Note: When using the RA2 or RA3 pin(s) as out- put(s), read-modify-write instructions (such as BCF, BSF, BTG) on PORTA are not rec- ommended. Such operations read the port pins, do the desired operation, and then write this value to the data latch. This may inadvertently cause the RA2 or RA3 pins to switch from input to output (or vice-versa). It is recommended to use a shadow regis- ter for PORTA. Do the bit operations on this shadow register and then move it to PORTA. Note: I/O pins have protection diodes to VDD and VSS. DATA BUS RD_PORTA (Q2) This document was created with FrameMaker404 |
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