LAN8804SLASHZMXC1 datasheet(24/91 Pages) MICROCHIP

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LAN8804

DS00003591G-page 24

3.3.2

PHY ADDRESS (PHYAD[4:0])

The

PHYAD[4:0] configuration straps set the base value of the PHY’s management address. The addresses of each of

the 4 PHYs are the base value, as defined by

PHYAD[4:0], plus offsets of 0, 1, 2 and 3.

3.3.3

ALL PHYs ADDRESS (ALLPHYAD)

The

ALLPHYAD configuration strap sets the default of the All-PHYAD Enable bit in the Common Control register which

enables (pulled-down) or disables (pulled-up) the PHY’s ability to respond to PHY Address 0 as well as it’s assigned

PHY address.

3.3.4

LED MODE SELECT (LED_MODE)

The

LED_MODE configuration strap selects between Individual-LED (pulled-up) or Tri-color-LED (pulled-down)

modes. All 8 LEDs are configured with identical behavior. The

LED_MODE configuration strap is sampled and latched

at power-up/reset and is defined as follows:

0: Tri-color-LED mode

1: Individual-LED mode

LED operation is described in Section 5.17, "LEDs".

01110 RESERVED

01111 RESERVED

11110 RESERVED

Note:

This strap input is inverted compared to the register bit.

TABLE 3-9:

DEVICE MODE SELECTIONS (PRELIMINARY) (CONTINUED)

Legend:

1000FD = 1000BASE-T Full Duplex

100FD = 100BASE-TX Full Duplex

100HD = 100BASE-TX Half Duplex

10FD = 10BASE-T Full Duplex

10HD = 10BASE-T Half Duplex

“X” means “is advertised by auto-negotiation” (for example 10BT FD and 10BT HD are both available auto-negotiation

results when MODE_SEL = 10000).

LAN8804/ZMXC1 Datasheet(PDF) 24 Page - Microchip Technology