6MPS5 datasheet(76/101 Pages) TI1

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19.0 Memory Map

Please refer to individual datasheets for its own set of mem-

ory maps. The CompactRISC architecture supports a uni-

form linear address space of 2 megabytes. The device

implementation of this architecture uses only the lowest 64

kbytes of address space, ranging from 0000 to FFFF hex.

Table20 is a memory map showing the types of memory and

peripherals that occupy this memory space. Address ranges

not listed in the table are reserved and should not be read or

written.

Table21 is a detailed memory map showing the specific

memory address of the memory, I/O ports, and registers. The

table shows the starting address, the size, and a brief de-

scription of each memory block and register. For detailed in-

formation on using these memory locations, see the

applicable sections in the data sheet.

All addresses not listed in the table are reserved and should

not be read or written. An attempt to access an unlisted ad-

dress will have unpredictable results.

Each byte-wide register occupies a single address and can

be accessed only in a byte-wide transaction. Each word-wide

can be accessed only in a word-wide transaction. Both the

byte-wide and word-wide registers reside at word boundaries

(even address). Thus, each byte-wide register uses only the

lowest eight bits of the internal data bus.

Most device registers are read/write registers. However,

some registers are read-only or write-only, as indicated in the

table. An attempt to read a write-only register or to write a

read-only register will have unpredictable results.

When the software writes to a register in which one or more

bits are reserved, it must write a zero to each reserved bit un-

less indicated otherwise in the description of the register.

Reading a reserved bit returns an undefined value.

Table 20

Device Memory Map

Address

Range (hex)

Description

0000-BFFF

Flash Program Memory (48 kbytes)

DA00-DFF7

ISP Memory (1.5 kbytes)

DFF8-DFFF

Program ROM control/status

E000-E7FF

Static RAM (2 kbytes)

F000-F27F

EEPROM Data Memory (640 bytes)

F900-F930

Device configuration registers

FB00-FB06

Port B registers

FB10-FB16

Port C registers

FC40-FC88

Clock, Power Management, and Wake-up

registers

FCA0-FCA8

Port G registers

FD20-FD28

Port F registers

FE00-FE0C

Interrupt registers

FE40-FE4E

USART 1 registers

FE60-FE68

MICROWIRE registers

FE80-FE8E

USART 2 registers

FEE0-FEE8

Port I registers

FF00-FF08

Port L registers

FF20-FF2A

Timer and WATCHDOG registers

FF40-FF50

MFT1 Timer registers

FF60-FF70

MFT2 Timer registers

FFC0-FFD0

A/D Converter registers

FFE0-FFE0

Analog Comparator register

a. 44 pin devices may not include this module

CR16MNS5, CR16MFS5, and CR16MPS5 are Obsolete Devices

6MPS5 Datasheet(PDF) 76 Page - Texas Instruments

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