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6MPS5 Datasheet(PDF) 65 Page - Texas Instruments |
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6MPS5 Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 101 page ![]() www.national.com 64 register and the Transmit Buffer Empty flag (UnTBE) is set. The UnTBE flag is automatically reset by the USART when the software loads a new character into the UnTBUF register. During transmission, the UnXMIP bit is set high by the USART. This bit is reset only after the USART has sent the last frame bit of the current character and the UnTBUF regis- ter is empty. The receive shift register (RSFT) and the receive buffer (UnRBUF) double-buffer the data being received. Serial data received on the RDXn pin is shifted into the RSFT register at the first falling edge of the clock. Each subsequent falling edge of the clock causes an additional bit to be shifted into the RSFT register. The USART assumes a complete charac- ter has been received after the correct number of rising edg- es on CKXn (based on the selected frame format) have been detected. Upon receiving a complete character, the contents of the RSFT register are copied into the UnRBUF register and the Receive Buffer Full flag (UnRBF) is set. The UnRBF flag is automatically reset when the software reads the char- acter from the UnRBUF register. The transmitter and receiver may be clocked from either an external source provided to the CKXn pin or by the internal baud rate generator. In the latter case, the clock signal is placed on the CKXn pin as an output. 16.2.3 Attention Mode The Attention mode is available for networking this device with other processors. This mode requires the 9-bit data for- mat with no parity. The number of start bits and number of stop bits are programmable. In this mode, two types of 9-bit characters are sent on the network: address characters con- sisting of 8 address bits and a 1 in the ninth bit position and data characters consisting of 8 data bits and a 0 in the ninth bit position. While in Attention mode, the USART receiver monitors the communication flow but ignores all characters until an ad- dress character is received. Upon the receipt of an address character, the contents of the receive shift register are copied to the receive buffer. The UnRBF flag is set and an interrupt (if enabled) is generated. The UnATN bit is automatically re- set to zero, and the USART begins receiving all subsequent characters. The software must examine the contents of the UnRBUF register and respond by accepting the subsequent characters (by leaving the UnATN bit reset) or waiting for the next address character (by setting the UnATN bit again). The operation of the USART transmitter is not affected by the selection of this mode. The value of the ninth bit to be trans- mitted is programmed by setting or clearing a bit called UnXB9 in the USART Frame Select Register. The value of the ninth bit received is read from another register bit called UnRB9 in the USART Status Register. 16.2.4 Diagnostic Mode The Diagnostic mode is available for testing of the USART. In this mode, the TDXn and RDXn pins are internally connected together, and data that is shifted out of the transmit shift reg- ister is immediately transferred to the receive shift register. This mode supports only the 9-bit data format with no parity. The number of start and stop bits is programmable. 16.2.5 Frame Format Selection The format shown in Figure29 consists of a start bit, seven data bits (excluding parity), and one or two stop bits. If parity bit generation is enabled by setting the UnPEN bit, a parity bit is generated and transmitted following the seven data bits. The format shown in Figure30 consists of one start bit, eight data bits (excluding parity), and one or two stop bits. If parity bit generation is enabled by setting the UnPEN bit, a parity bit is generated and transmitted following the eight data bits. The format shown in Figure31 consists of one start bit, nine data bits, and one or two stop bits. This format also supports the USART attention feature. When operating in this format, all eight bits of UnTBUF and UnRBUF are used for data. The ninth data bit is transmitted and received using two bits in the control registers, called UnXB9 and UnRB9. Parity is not generated or verified in this mode. 16.2.6 Baud Rate Generator The Baud Rate Generator creates the basic baud clock from the system clock. The system clock is passed through a two- Figure 28. USART Synchronous Communication CKX TDX RDX Sample Input Figure 29. Seven Data Bit Frame Options Figure 30. Eight Data Bit Frame Options 1 START BIT 7 BIT DATA S 1a START BIT 7 BIT DATA 2S 1c START BIT 7 BIT DATA 2S PA 1b START BIT 7 BIT DATA S PA 2 START BIT 8 BIT DATA S 2a START BIT 8 BIT DATA 2S 2b START BIT 8 BIT DATA S PA 2c START BIT 8 BIT DATA 2S PA CR16MNS5, CR16MFS5, and CR16MPS5 are Obsolete Devices |
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