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ADP5050ACPZ-R7 Datasheet(PDF) 14 Page - Analog Devices

No. de pieza ADP5050ACPZ-R7
Descripción Electrónicos  5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator
PDF  60 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

ADP5050ACPZ-R7 Datasheet(HTML) 14 Page - Analog Devices

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ADP5050
Data Sheet
Rev. 0 | Page 14 of 60
0
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100
0
0.2
0.4
0.6
0.8
1.0
1.2
IOUT (A)
fSW = 1.0MHz
fSW = 600kHz
fSW = 300kHz
Figure 11. Channel 3/Channel 4 Efficiency Curve, VIN = 12 V, VOUT = 1.8 V,
FPWM Mode
0
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0
0.1
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IOUT (A)
VOUT = 1.2V, FPWM
VOUT = 1.2V, AUTO PWM/PSM
VOUT = 1.8V, FPWM
VOUT = 1.8V, AUTO PWM/PSM
VOUT = 3.3V, FPWM
VOUT = 3.3V, AUTO PWM/PSM
Figure 12. Channel 3/Channel 4 Efficiency Curve, VIN = 12 V, fSW = 600 kHz,
FPWM and and Automatic PWM/PSM Modes
–0.4
–0.3
–0.2
–0.1
0
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0
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IOUT (A)
Figure 13. Channel 1 Load Regulation, VIN = 12 V, VOUT = 3.3 V, fSW = 600 kHz,
FPWM Mode
–0.4
–0.3
–0.2
–0.1
0
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4.5
6.0
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9.0
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15.0
INPUT VOLTAGE (V)
Figure 14. Channel 1 Line Regulation, VOUT = 3.3 V, IOUT = 4 A,
fSW = 600 kHz, FPWM Mode
–0.4
–0.3
–0.2
–0.1
0
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1.0
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IOUT (A)
Figure 15. Channel 3 Load Regulation, VIN = 12 V, VOUT = 3.3 V, fSW = 600 kHz,
FPWM Mode
–0.4
–0.3
–0.2
–0.1
0
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9.0
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13.5
15.0
INPUT VOLTAGE (V)
Figure 16. Channel 3 Line Regulation, VOUT = 3.3 V, IOUT = 1 A,
fSW = 600 kHz, FPWM Mode



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