SPC560P50L3 datasheet(19/112 Pages) STMICROELECTRONICS

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SPC560P44Lx, SPC560P50Lx

Introduction

Doc ID 14723 Rev 9

19/112

The SIU provides the following features:

●

Centralized general purpose input output (GPIO) control of as many as 80 input/output

pins and 26 analog input-only pads (package dependent)

●

All GPIO pins can be independently configured to support pull-up, pull down, or no pull

●

Reading and writing to GPIO supported both as individual pins and 16-bit wide ports

●

All peripheral pins (except ADC channels) can be alternatively configured as both

general purpose input or output pins

●

ADC channels support alternative configuration as general purpose inputs

●

Direct readback of the pin value is supported on all pins through the SIUL

●

Configurable digital input filter that can be applied to some general purpose input pins

for noise elimination: as many as 4 internal functions can be multiplexed onto 1 pin

1.5.17

Boot and censorship

Different booting modes are available in the SPC560P44Lx, SPC560P50Lx: booting from

internal flash memory and booting via a serial link.

The default booting scheme uses the internal flash memory (an internal pull-down is used to

select this mode). Optionally, the user can boot via FlexCAN or LINFlex (using the boot

assist module software).

A censorship scheme is provided to protect the content of the flash memory and offer

increased security for the entire device.

A password mechanism is designed to grant the legitimate user access to the non-volatile

memory.

Boot assist module (BAM)

The BAM is a block of read-only one-time programmed memory and is identical for all

SPC560Pxx devices that are based on the e200z0h core. The BAM program is executed

every time the device is powered on if the alternate boot mode has been selected by the

user.

The BAM provides the following features:

●

Serial bootloading via FlexCAN or LINFlex

●

Ability to accept a password via the used serial communication channel to grant the

legitimate user access to the non-volatile memory

1.5.18

Error correction status module (ECSM)

The ECSM provides a myriad of miscellaneous control functions regarding program-visible

information about the platform configuration and revision levels, a reset status register, a

software watchdog timer, wakeup control for exiting sleep modes, and information on

platform memory errors reported by error-correcting codes and/or generic access error

information for certain processor cores.

The Error Correction Status Module supports a number of miscellaneous control functions

for the platform. The ECSM includes these features:

●

Registers for capturing information on platform memory errors if error-correcting codes

(ECC) are implemented

●

For test purposes, optional registers to specify the generation of double-bit memory

errors are enabled on the SPC560P44Lx, SPC560P50Lx.

SPC560P50L3 Datasheet(PDF) 19 Page - STMicroelectronics

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