SPC560P50L3 datasheet(59/112 Pages) STMICROELECTRONICS

59 / 112 page

SPC560P44Lx, SPC560P50Lx

Electrical characteristics

Doc ID 14723 Rev 9

59/112

C.E. Triplett and B. Joiner, An Experimental Characterization of a 272 PBGA Within an

Automotive Engine Controller Module, Proceedings of SemiTherm, San Diego, 1998,

pp. 47–54.

G. Kromann, S. Shidore, and S. Addison, Thermal Modeling of a PBGA for Air-Cooled

Applications, Electronic Packaging and Production, pp. 53–58, March 1998.

B. Joiner and V. Adams, Measurement and Simulation of Junction to Board Thermal

Resistance and Its Application in Thermal Modeling, Proceedings of SemiTherm, San

Diego, 1999, pp. 212–220.

3.6

Electromagnetic interference (EMI) characteristics

3.7

Electrostatic discharge (ESD) characteristics

3.8

Power management electrical characteristics

3.8.1

Voltage regulator electrical characteristics

The internal voltage regulator requires an external NPN ballast to be connected as shown in

Figure 9. Table 16 contains all approved NPN ballast components. Capacitances should be

placed on the board as near as possible to the associated pins. Care should also be taken

to limit the serial inductance of the VDD_HV_REG, BCTRL and VDD_LV_CORx pins to less than

Table 14.

EMI testing specifications

Symbol

Parameter

Conditions

Clocks

Frequency

Level

(Max)

Unit

VEME Radiated emissions

Device configuration, test

conditions and EM testing per

standard IEC61967-2

Supply voltage = 5 V DC

Ambient temperature = 25 °C

Worst-case orientation

fOSC 8MHz

fCPU 64 MHz

No PLL frequency

modulation

150 kHz–150 MHz

dBµV

150–1000 MHz

IEC Level

—

fOSC 8MHz

fCPU 64 MHz

1% PLL frequency

modulation

150 kHz–150 MHz

dBµV

150–1000 MHz

IEC Level

—

Table 15.

ESD ratings(1),(2)

Symbol

Parameter

Conditions

Value

Unit

VESD(HBM)

Electrostatic discharge (Human Body Model)

—

2000

VESD(CDM)

Electrostatic discharge (Charged Device Model)

—

750 (corners)

500 (other)

All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits.

A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification

requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at

room temperature followed by hot temperature, unless specified otherwise in the device specification.

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