ATmega48 datasheet(288/340 Pages) ATMEL

288 / 340 page

288

7530H–AVR–02/09

ATmega48/88/168 Automotive

25.7.5

Programming the EEPROM

The EEPROM is organized in pages, see Table 25-13 on page 284. When programming the

EEPROM, the program data is latched into a page buffer. This allows one page of data to be

programmed simultaneously. The programming algorithm for the EEPROM data memory is as

follows (refer to “Programming the Flash” on page 286 for details on Command, Address and

Data loading):

A: Load Command “0001 0001”.

G: Load Address High Byte (0x00 - 0xFF).

B: Load Address Low Byte (0x00 - 0xFF).

C: Load Data (0x00 - 0xFF).

E: Latch data (give PAGEL a positive pulse).

K: Repeat 3 through 5 until the entire buffer is filled.

L: Program EEPROM page

Set BS1 to “0”.

Give WR a negative pulse. This starts programming of the EEPROM page. RDY/BSY

goes low.

Wait until to RDY/BSY goes high before programming the next page (See Figure 25-4

for signal waveforms).

Figure 25-4. Programming the EEPROM Waveforms

25.7.6

Reading the Flash

The algorithm for reading the Flash memory is as follows (refer to “Programming the Flash” on

page 286 for details on Command and Address loading):

A: Load Command “0000 0010”.

G: Load Address High Byte (0x00 - 0xFF).

B: Load Address Low Byte (0x00 - 0xFF).

Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.

Set BS1 to “1”. The Flash word high byte can now be read at DATA.

Set OE to “1”.

RDY/BSY

RESET +12V

PAGEL

BS2

0x11

ADDR. HIGH

DATA

ADDR. LOW

DATA

ADDR. LOW

DATA

XA1

XA0

BS1

XTAL1

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