ATmega48 datasheet(17/340 Pages) ATMEL

No. de pieza	ATmega48

Descripción Electrónicos	8-bit Microcontroller with 8K Bytes In-System Programmable Flash

PDF	340 Pages

Scroll/Zoom	100%

Fabricante Electrónico	ATMEL [ATMEL Corporation]

Página de inicio	http://www.atmel.com

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17 / 340 page

7530H–AVR–02/09

ATmega48/88/168 Automotive

Figure 5-3.

Data Memory Map

5.2.1

Data Memory Access Times

This section describes the general access timing concepts for internal memory access. The

internal data SRAM access is performed in two clk

CPU cycles as described in Figure 5-4.

Figure 5-4.

On-chip Data SRAM Access Cycles

5.3

EEPROM Data Memory

The ATmega48/88/168 contains 256/512/512 bytes of data EEPROM memory. It is organized

as a separate data space, in which single bytes can be read and written. The EEPROM has an

endurance of at least 100,000 write/erase cycles. The access between the EEPROM and the

CPU is described in the following, specifying the EEPROM Address Registers, the EEPROM

Data Register, and the EEPROM Control Register.

“Memory Programming” on page 278 contains a detailed description on EEPROM Programming

in SPI or Parallel Programming mode.

32 Registers

64 I/O Registers

Internal SRAM

(512/1024/1024 x 8)

0x0000 - 0x001F

0x0020 - 0x005F

0x02FF/0x04FF/0x04FF

0x0060 - 0x00FF

Data Memory

160 Ext I/O Reg.

0x0100

clk

Data

Address

Address valid

Compute Address

CPU

Memory Access Instruction

Next Instruction

ATmega48 Datasheet(PDF) 17 Page - ATMEL Corporation