WM8785

Production Data

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PD Rev 4.1 December 2006

26

OVERSAMPLING RATIOS AND SIGMA-DELTA MODULATOR FREQUENCY

For correct operation of the device and optimal performance, the user must select the appropriate

ADC modulator oversampling ratio. The oversampling ratio is selected using the OSR[1:0] bits.

REGISTER

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R0(h00)

Signal Control

4:3

OSR[1:0]

00

Oversampling Ratio

Control

00: Single Rate (128fs)

01: Dual Rate (64fs)

10: Quad Rate (32fs)

11: Not Valid

Table 9 Oversampling Ratio Selection

The WM8785 can operate at sample rates from 8kHz to 192kHz. The WM8785 uses a sigma-delta

modulator that operates at frequencies between 1.024MHz and 6.144MHz

SAMPLING RATE

(LRCLK)

OVERSAMPLING RATIO

SIGMA-DELTA

MODULATOR

FREQUENCY (MHZ)

8kHz

Single Rate (128fs)

1.024

32kHz

Single Rate (128fs)

4.096

44.1kHz

Single Rate (128fs)

5.6448

48kHz

Single Rate (128fs)

6.144

96kHz

Dual Rate (64fs)

6.144

192kHz

Quad Rate (32fs)

6.144

Table 10 Sigma-delta Modulator Frequency

MASTER CLOCK AND AUDIO SAMPLE RATES

the WM8785 automatically detects the audio sample rate. In Master mode the master clock

frequency is selected using MCR[2:0] bits. This is described in table below.

REGISTER

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R0(h00)

Clocking, Sample

Rates,

2:0

MCR[2:0]

000

Master/Slave Selection

000: Slave Mode

001: Master Mode, 128fs

010: Master Mode, 192fs

011: Master Mode, 256fs

100: Master Mode, 384fs

101: Master Mode, 512fs

110: Master Mode, 768fs

Table 11 Master Clock Frequency

The master clock (MCLK) is used to operate the digital filters and the noise shaping circuits. The

WM8785 supports a wide range of master clock frequencies, and can generate many commonly

used audio sample rates directly from the master clock. Table 1 shows the recommended master

clock frequencies for different sample rates